coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2023-02-04	mb/*: Replace SNB PCI devices with references from chipset.cb	Arthur Heymans
2022-12-01	cpu/intel/model_206ax: Remove fake lapic device	Arthur Heymans
2022-12-01	cpu/intel/sandybridge: Use enum for ACPI C states	Arthur Heymans
2022-11-30	nb/intel/sandybridge: Add a chipset devicetree	Arthur Heymans
2022-01-04	sb/intel: Use `bool` for PCIe coalescing option	Angel Pons
2021-05-18	mainboard: Use decimal for `device lapic 0x0 on`	Angel Pons
2021-01-06	cpu/intel/model_206ax: Rename `cX_acpower` options	Angel Pons
2021-01-06	cpu/intel/model_206ax: Unify ACPI C-state options	Angel Pons
2020-09-08	nb/intel/sandybridge: Use an enum for `gpu_panel_port_select`	Angel Pons
2020-05-18	src: Remove leading blank lines from SPDX header	Elyes HAOUAS
2020-05-11	treewide: Remove "this file is part of" lines	Patrick Georgi
2020-05-09	src/: Replace GPL boilerplate with SPDX headers	Patrick Georgi
2020-03-18	mainboard/[^a-p]*: Remove copyright notices	Patrick Georgi
2019-07-19	sb/intel/{bd82x6x\|ibexpeak}: Drop p_cnt_throttling_supported	Patrick Rudolph
2019-01-24	cpu/intel/model_206ax: Remove the notion of sockets	Arthur Heymans
2019-01-23	mb///devicetree.cb: Make sandybridge devicetree uniform	Arthur Heymans
2018-06-14	src: Get rid of unneeded whitespace	Elyes HAOUAS
2017-10-22	superio/ite/common: Add temperature offset	Vagiz Trakhanov
2016-12-15	mb/roda/rv11: Add new boards Lizard RV11 and RW11	Dennis Wassenberg