coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2024-06-26	skl mainboards/dt: Move serirq setting into LPC device scope	Felix Singer
2024-06-26	skl mainboards/dt: Move genx_dec settings into LPC device scope	Felix Singer
2024-06-24	skl mainboards/dt: Drop SataPortsEnable[x] setting if disabled	Felix Singer
2024-06-24	skl mainboards/dt: Drop SataSalpSupport setting if disabled	Felix Singer
2024-06-24	skl mainboards/dt: Drop ScsEmmcHs400Enabled setting if disabled	Felix Singer
2024-06-24	skl mainboards/dt: Drop SsicPortEnable setting if disabled	Felix Singer
2024-06-23	skl mainboards: Move cpu_cluster device to chipset devicetree	Felix Singer
2024-06-11	mb/razer/blade_stealth_kbl: add panel_cfg	Reagan Bohan
2024-06-03	mb/razer/blade_stealth_kbl: Add H3Q variant	Reagan Bohan
2024-01-02	mb/razer: Make use of chipset devicetree	Felix Singer
2023-10-28	mb/{sm/x11,razor,libretrend}/dt: Use comma separated list for arrays	Felix Singer
2023-10-25	devicetrees: Remove trailing backslash from multiline values	Felix Singer
2023-01-30	mb/*: Remove lapic from devicetree	Arthur Heymans
2022-09-09	mb/*/{device,override}tree: Set touchpads to use detect (vs probed) flag	Matt DeVillier
2022-01-16	soc/intel/skl: Replace dt `HeciEnabled` by `HECI1 disable` config	Subrata Banik
2021-12-12	mainboard: Drop `SataMode` setting from Skylake devicetrees	Felix Singer
2021-08-31	mb/razer/blade_stealth_kbl: Disable UART #0 in devicetree	Angel Pons
2021-08-28	soc/intel/common: Use CHIPSET_LOCKDOWN_COREBOOT by default	Felix Singer
2021-04-12	mb/*: drop LPC generic range for port 80	Michael Niewöhner
2021-02-12	mb/razer/blade_stealth_kbl: Configure IRQs as level triggered for HID over I2C	Karthikeyan Ramasubramanian
2020-12-14	soc/intel/skylake: Drop always-zero ProbelessTrace dt setting	Angel Pons
2020-12-14	soc/intel/skylake: Drop unreferenced PttSwitch dt setting	Angel Pons
2020-11-13	soc/intel/{skl,cnl}: replace PM ACPI timer dt option by Kconfig	Michael Niewöhner
2020-10-26	mb/*,soc/intel: drop the obsolete dt option `speed_shift_enable`	Michael Niewöhner
2020-08-08	soc/intel/skylake: Enable CIO depending on devicetree configuration	Felix Singer
2020-08-08	soc/intel/skylake: Enable SDXC depending on devicetree configuration	Felix Singer
2020-08-07	soc/intel/skylake: Enable thermal subsystem depending on devicetree	Felix Singer
2020-07-29	soc/intel/skylake: Enable HDA depending on devicetree configuration	Felix Singer
2020-07-29	soc/intel/skylake: Enable eMMC depending on devicetree configuration	Felix Singer
2020-07-29	soc/intel/skylake: Enable TraceHub depending on devicetree configuration	Felix Singer
2020-07-29	soc/intel/skylake: Enable SMBus depending on devicetree configuration	Felix Singer
2020-07-29	soc/intel/skylake: Enable LAN depending on devicetree configuration	Felix Singer
2020-07-29	soc/intel/skylake: Enable SATA depending on devicetree configuration	Felix Singer
2020-07-26	skylake boards: Factor out copy-pasted PIRQ routes	Angel Pons
2020-05-18	skylake: update processor power limits configuration	Sumeet R Pawnikar
2020-01-10	mb/**/devicetree.cb: Remove untrue comments	Angel Pons
2019-09-24	Add Razer Blade Stealth (2016) H2U	Johanna Schander