| Age | Commit message (Expand) | Author |
|---|---|---|
| 2020-03-25 | superio/nuvoton/nct5104d: add chip config option to reset GPIOs | Michał Żygowski |
| 2020-03-25 | mb/pcengines/*/devicetree: remove non-existing NCT5104d LDN 0xe | Michał Żygowski |
| 2020-03-18 | mainboard/[g-p]*: Remove copyright notices | Patrick Georgi |
| 2020-01-20 | mb/pcengines/*: enable simple IO-based GPIO control | Piotr Kleinschmidt |
| 2020-01-15 | mb/pcengines: Enable SuperIO LDN 0xf for GPIO soft reset | Piotr Kleinschmidt |
| 2019-02-12 | binaryPI: Drop nested northbridge in devicetree | Kyösti Mälkki |
| 2018-09-15 | pcengines/apu2: enable IOMMU for all apu2 variants | Piotr Król |
| 2018-04-29 | pcengines/apu2: remove TPM from devicetree for apu3 | Piotr Król |
| 2017-12-21 | pcengines/apu2: add support for apu4 variant | Piotr Król |
| 2017-10-20 | mainboard/pcengines/apu2: add apu3 and apu5 variants | Kamil Wcislo |
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index : coreboot.git | |
| my copy of coreboot | User & |
| summaryrefslogtreecommitdiff |