coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2020-04-30	mb/ocp/tiogapass: Implement port 80h direct to GPIO and init UART pins	BryantOu
2020-04-18	mb/ocp/tiogapass: Pull POST complete pin	BryantOu
2020-04-14	mb/ocp/tiogapass: Add missing spaces around operators	Paul Menzel
2020-04-06	mainboard/ocp: Use SPDX for GPL-2.0-only files	Angel Pons
2020-03-26	mb/ocp/tiogapass: Properly configure early serial output	Andrey Petrov
2020-03-26	soc/intel/xeon_sp: Refactor code to allow for additional CPUs types	Andrey Petrov
2020-03-25	mb/ocp/tiogapass: Enable IPMI KCS	Johnny Lin
2020-03-18	mainboard/[g-p]*: Remove copyright notices	Patrick Georgi
2020-03-10	soc/intel/xeon-sp,mb/ocp/tiogapass: Don't fake binaries	Nico Huber
2020-03-06	mainboard/ocp: Add support for OCP platform TiogaPass	Jonathan Zhang