| Age | Commit message (Expand) | Author |
|---|---|---|
| 2024-05-06 | soc/intel/xeon_sp/acpi: Refactor Xeon-SP ASL file location | Shuo Liu |
| 2022-08-16 | mb/**/dsdt.asl: Drop misleading "OEM revision" comment | Angel Pons |
| 2021-01-27 | ACPI: Add top-level ASL | Kyösti Mälkki |
| 2020-12-10 | soc/intel/xeon_sp/nvs: Use common global NVS | Marc Jones |
| 2020-11-07 | mainboard/ocp/deltalake: Use xeon_sp pch.asl | Marc Jones |
| 2020-10-13 | {src/mb,util/autoport}: Use macro for DSDT revision | Elyes HAOUAS |
| 2020-10-03 | soc/intel/xeon_sp: Use common ASL code for xeon_sp | Marc Jones |
| 2020-09-28 | mb/ocp/deltalake: add LPC device entry in ACPI | Jonathan Zhang |
| 2020-06-22 | mb/ocp/deltalake: Add OCP Delta Lake mainboard | Jonathan Zhang |
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index : coreboot.git | |
| my copy of coreboot | User & |
| summaryrefslogtreecommitdiff |