| Age | Commit message (Expand) | Author |
|---|---|---|
| 2020-07-29 | soc/intel/skylake: Enable SATA depending on devicetree configuration | Felix Singer |
| 2020-07-26 | skylake boards: Factor out copy-pasted PIRQ routes | Angel Pons |
| 2020-05-18 | skylake: update processor power limits configuration | Sumeet R Pawnikar |
| 2020-05-11 | treewide: Remove "this file is part of" lines | Patrick Georgi |
| 2020-05-02 | acpi: Move ACPI table support out of arch/x86 (3/5) | Furquan Shaikh |
| 2020-04-05 | fsp2_0: Clean up around `config FSP_USE_REPO` | Nico Huber |
| 2020-03-10 | mb/libretrend/lt1000: Add Libretrend LT1000 mainboard | Michał Żygowski |
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index : coreboot.git | |
| my copy of coreboot | User & |
| summaryrefslogtreecommitdiff |