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2018-01-15Intel i855 board & chips: Remove - using LATE_CBMEM_INITMartin Roth
All boards and chips that are still using LATE_CBMEM_INIT are being removed as previously discussed. If these boards and chips are updated to not use LATE_CBMEM_INIT, they can be restored to the active codebase from the 4.7 branch. chips: northbridge/intel/i855 Mainboards: mainboard/lanner/em8510 Change-Id: Ic9ba0ba7e2b6e602a5749cc531dd705c49e3f08d Signed-off-by: Martin Roth <gaumless@gmail.com> Reviewed-on: https://review.coreboot.org/22029 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2016-09-29mainboard/lanner/em8510: Use tabs for indentsElyes HAOUAS
Change-Id: Ib6191c590144438d7d9d6772d792a83e92d5516a Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/16783 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2013-02-14sconfig: rename lapic_cluster -> cpu_clusterStefan Reinauer
The name lapic_cluster is a bit misleading, since the construct is not local APIC specific by concept. As implementations and hardware change, be more generic about our naming. This will allow us to support non-x86 systems without adding new keywords. Change-Id: Icd7f5fcf6f54d242eabb5e14ee151eec8d6cceb1 Signed-off-by: Stefan Reinauer <reinauer@google.com> Signed-off-by: David Hendricks <dhendrix@chromium.org> Reviewed-on: http://review.coreboot.org/2377 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-02-14sconfig: rename pci_domain -> domainStefan Reinauer
The name pci_domain was a bit misleading, since the construct is only PCI specific in a particular (northbridge/cpu) implementation, but not by concept. As implementations and hardware change, be more generic about our naming. This will allow us to support non-PCI systems without adding new keywords. Change-Id: Ide885a1d5e15d37560c79b936a39252150560e85 Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/2376 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2011-04-19Drop baud rate init to an arbitrary baud rate from Super I/O code. ↵Stefan Reinauer
See discussion at http://www.mail-archive.com/coreboot@coreboot.org/msg29394.html config->com1, devicetree.cb cleanup and init_uart8250() removal will follow once this patch is comitted Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Acked-by: Patrick Georgi <patrick@georgi-clan.de> Updated to drop com1, com2.... from config structure and devicetree.cb git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6521 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-11-16Drop W83627THF, it's the same device as W83627THG.Uwe Hermann
The only difference is that the "G" version is in a Pb-free package, which is not relevant from a programmer's view. We keep W83627THG (and drop W83627THF) because: - The W83627THF had a CIR device / LDN which doesn't actually exist. - The W83627THF had no GPIO2, GPIO3 LDNs (were commented out). - The W83627THF didn't use the PNP_MSC0/1 which is needed/used by boards. This also fixes an issue on MSI MS7135's devicetree.cb: device pnp 4e.6 off end # XXX keep allocator happy The line above can be (and is) removed, as it was only needed due to the incorrect CIR LDN in the W83627THF. In the iwill/dk8x target: Drop incorrect LDNs 4 and 6, add 0xb. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6080 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-08-30Support for Lanner EM-8510 BoardAndreas Schultz
Signed-off-by: Andreas Schultz <aschultz@tpip.net> Acked-by: Stefan Reinauer <stepan@coresystems.de> --- src/mainboard/Kconfig | 8 ++ src/mainboard/lanner/Kconfig | 8 ++ src/mainboard/lanner/em8510/Kconfig | 38 +++++++++++ src/mainboard/lanner/em8510/Makefile.inc | 21 ++++++ src/mainboard/lanner/em8510/chip.h | 23 +++++++ src/mainboard/lanner/em8510/cmos.layout | 74 +++++++++++++++++++++ src/mainboard/lanner/em8510/devicetree.cb | 60 +++++++++++++++++ src/mainboard/lanner/em8510/irq_tables.c | 56 ++++++++++++++++ src/mainboard/lanner/em8510/mainboard.c | 27 ++++++++ src/mainboard/lanner/em8510/romstage.c | 103 +++++++++++++++++++++++++++++ 10 files changed, 418 insertions(+), 0 deletions(-) create mode 100644 src/mainboard/lanner/Kconfig create mode 100644 src/mainboard/lanner/em8510/Kconfig create mode 100644 src/mainboard/lanner/em8510/Makefile.inc create mode 100644 src/mainboard/lanner/em8510/chip.h create mode 100644 src/mainboard/lanner/em8510/cmos.layout create mode 100644 src/mainboard/lanner/em8510/devicetree.cb create mode 100644 src/mainboard/lanner/em8510/irq_tables.c create mode 100644 src/mainboard/lanner/em8510/mainboard.c create mode 100644 src/mainboard/lanner/em8510/romstage.c git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5752 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1