coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2020-02-26	mb/intel/tglrvp: add Tiger Lake memory initialization support	Srinidhi N Kaushik
2020-02-05	mb/intel/tglrvp: pin mux for ISH	Wonkyu Kim
2020-01-29	mb/intel/tglrvp: pin mux for image clocks	Wonkyu Kim
2020-01-28	mb/intel/tglrvp: Enable DP ports for TGLRVP	Wonkyu Kim
2020-01-27	mb/intel/tglrvp: Enable MIPI camera	Wonkyu Kim
2020-01-25	mb/intel/tglrvp: Enable rp11 for optane	Wonkyu Kim
2020-01-25	soc/intel/tigerlake: Fix GPIO communities	Shaunak Saha
2020-01-24	mb/intel/tglrvp: Enable SATA	Wonkyu Kim
2020-01-18	mb/intel/tglrvp: Update tglrvp_up3 devicetree	Ravi Sarawadi
2020-01-17	mb/tglrvp: update gpio pin mux for NVMe	Wonkyu Kim
2020-01-14	mb/intel/tglrvp: Add initial mainboard code	Ravi Sarawadi