Age | Commit message (Expand) | Author |
2023-01-30 | mb/*: Remove lapic from devicetree | Arthur Heymans |
2021-08-28 | soc/intel/common: Use CHIPSET_LOCKDOWN_COREBOOT by default | Felix Singer |
2021-05-07 | skylake DT/HALO mainboards: Drop `SaGv` setting | Angel Pons |
2021-03-01 | soc/intel/skylake: Clean up SD GPIO handling | Angel Pons |
2020-11-13 | soc/intel/{skl,cnl}: replace PM ACPI timer dt option by Kconfig | Michael Niewöhner |
2020-10-26 | mb/*,soc/intel: drop the obsolete dt option `speed_shift_enable` | Michael Niewöhner |
2020-08-08 | soc/intel/skylake: Enable SDXC depending on devicetree configuration | Felix Singer |
2020-08-07 | soc/intel/skylake: Enable thermal subsystem depending on devicetree | Felix Singer |
2020-07-29 | soc/intel/skylake: Enable HDA depending on devicetree configuration | Felix Singer |
2020-07-29 | soc/intel/skylake: Enable HECI3 depending on devicetree configuration | Felix Singer |
2020-07-29 | soc/intel/skylake: Enable eMMC depending on devicetree configuration | Felix Singer |
2020-07-29 | soc/intel/skylake: Enable SMBus depending on devicetree configuration | Felix Singer |
2020-07-29 | soc/intel/skylake: Enable LAN depending on devicetree configuration | Felix Singer |
2020-07-29 | soc/intel/skylake: Enable SATA depending on devicetree configuration | Felix Singer |
2020-07-26 | skylake boards: Factor out copy-pasted PIRQ routes | Angel Pons |
2020-07-26 | mb/intel/saddlebrook/devicetree.cb: Use PCH_IRQ* macros | Angel Pons |
2020-05-27 | mb/intel/saddlebrook: Remove duplicated PmTimerDisabled | Angel Pons |
2020-05-18 | skylake: update processor power limits configuration | Sumeet R Pawnikar |
2020-05-18 | mainboard/*/*/*.cb: Remove leading blank lines from SPDX header | Elyes HAOUAS |
2020-05-11 | treewide: Remove "this file is part of" lines | Patrick Georgi |
2020-05-09 | src/: Replace GPL boilerplate with SPDX headers | Patrick Georgi |
2020-03-18 | mainboard/[g-p]*: Remove copyright notices | Patrick Georgi |
2020-03-10 | mb/intel/{saddlebrook,kunimitsu}: Add macro for SaGv config | Praveen Hodagatta Pranesh |
2020-01-10 | mb/**/devicetree.cb: Remove untrue comments | Angel Pons |
2019-11-01 | mb/intel/saddlebrook: Enable Chipset_lockdown coreboot config | Praveen Hodagatta Pranesh |
2019-10-26 | mb/intel/saddlebrook: migrate to FSP 2.0 | Michael Niewöhner |
2019-04-06 | {mb,soc/intel/skylake}: remove unused InternalGfx | Maxim Polyakov |
2019-03-24 | soc/intel/common: Remove common chip config use_fsp_mp_init | Subrata Banik |
2019-03-01 | soc/intel/skylake: Unify serial IRQ options | Nico Huber |
2019-02-18 | soc/intel/skylake: Use real common code for VMX init | Nico Huber |
2018-06-22 | soc/intel/common/block/cpu: Add option to skip coreboot AP init | Subrata Banik |
2018-06-14 | src: Get rid of unneeded whitespace | Elyes HAOUAS |
2018-06-05 | soc/intel/skylake: Add option to skip coreboot MP init | Subrata Banik |
2018-03-28 | soc/intel/skylake: Limit xDCI feature when VBOOT is enabled | Duncan Laurie |
2017-12-19 | mainboard/intel/saddlebrook: add support for Saddle Brook | Teo Boon Tiong |