index
:
coreboot.git
macbookair5_2
macbookpro10_1
main
master
mbp101_medisable
mbp101_medisable_1
mbp82
x230
my copy of coreboot
User &
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
src
/
mainboard
/
intel
/
mtlrvp
/
spd
/
Makefile.inc
Age
Commit message (
Expand
)
Author
2023-01-30
mb/intel/mtlrvp: Add romstage and configure LP5 memory parts
Ashish Kumar Mishra
