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romstage.c
Age
Commit message (
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Author
2019-11-11
mb/{x4x}: Remove unused 'include <northbridge/intel/x4x/iomap.h>'
Elyes HAOUAS
2019-10-11
sb/intel/i82801gx: Move CIR init to a common place
Arthur Heymans
2019-08-26
soc/intel: Use common romstage code
Kyösti Mälkki
2019-08-18
cpu/intel: Enter romstage without BIST
Kyösti Mälkki
2019-04-13
sb/intel/i82801gx: Use SOUTHBRIDGE_INTEL_COMMON_PMCLIB
Patrick Rudolph
2019-03-04
device/pnp: Add header files for PNP ops
Kyösti Mälkki
2019-03-01
device/pci: Fix PCI accessor headers
Kyösti Mälkki
2019-02-08
mb/{asrock,intel,kontron}: Include missing <arch/io.h>
Elyes HAOUAS
2019-02-07
src: Remove unused include device/pnp_def.h
Elyes HAOUAS
2019-01-10
mb: Move timestamp_add_now to northbridge x4x
Elyes HAOUAS
2019-01-09
cpu/intel: Use the common code to initialize the romstage timestamps
Arthur Heymans
2019-01-08
sb/intel/i82801gx: Autodisable functions based on devicetree
Arthur Heymans
2018-12-28
arch/x86: Drop spurious arch/stages.h includes
Kyösti Mälkki
2018-08-13
mb: Get rid of unneeded include <cbmem.h>
Elyes HAOUAS
2018-05-26
mb/intel/dg41wv: Add mainboard
Arthur Heymans