coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2020-01-09	soc/intel/{cnl,icl,tgl}: Move northbridge.asl into common/block/acpi	Subrata Banik
2019-12-31	mb/**/dsdt.asl: Remove outdated sleepstates.asl comment	Angel Pons
2019-12-21	mb/**/dsdt.asl: Remove "Some generic macros" comment	Angel Pons
2019-11-01	soc/intel/{cnl,icl}: Move globalnvs.asl/nvs.h into common/block/	Subrata Banik
2019-11-01	soc/intel/{IA-CPU/SOC}: Move sleepstates.asl into southbridge/intel/common/acpi	Subrata Banik
2019-03-08	coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)	Julius Werner
2018-11-23	mb: Set coreboot as DSDT's manufacturer model ID	Elyes HAOUAS
2018-11-21	ACPI: Fix DSDT's revision field	Elyes HAOUAS
2017-10-20	soc/intel/cannonlake: Add platform.asl	Lijian Zhao
2017-10-12	mainboard/intel/cannonlake_rvp: Add Sleep states	Vaibhav Shankar
2017-09-19	mainboard/intel/cannonlake_rvp: Add PCI, PCIE IRQs to DSDT table	Bora Guvendik
2017-09-13	mainboard/intel/cannonlake_rvp: Add dummy DSDT table	Lijian Zhao
2017-09-06	Revert "soc/intel/cannonlake: Add dummy ACPI DSDT table"	Kyösti Mälkki
2017-09-06	soc/intel/cannonlake: Add dummy ACPI DSDT table	Lijian Zhao