| Age | Commit message (Expand) | Author |
|---|---|---|
| 2021-08-13 | mb/intel/adlrvp: Update DIMM type as memory down for DDR5 MR SKU | Meera Ravindranath |
| 2021-03-28 | mb/intel/adlrvp_m: Enable ADL-M RVP LP5 memory configuration | Maulik V Vaghela |
| 2021-03-28 | mb/intel/adlrvp_m: Enable ADL_M RVP LP4 memory configuration | Maulik V Vaghela |
| 2021-02-22 | mb/intel/adlrvp: Add support for LP5 SKU with boardid 0x17 | Subrata Banik |
| 2020-12-01 | mb/intel/adlrvp: Add support for LPDDR5 | Sridhar Siricilla |
| 2020-10-11 | mb/intel/adlrvp: Add ADL-P romstage mainboard code | Subrata Banik |
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index : coreboot.git | |
| my copy of coreboot | User & |
| summaryrefslogtreecommitdiff |