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path: root/src/mainboard/intel/adlrvp/devicetree.cb
AgeCommit message (Expand)Author
2021-02-05soc/intel/alderlake: Refactor PCIE port configEric Lai
2021-02-01soc/intel/alderlake: Create separate Kconfig for CLKSRC and CLKREQSubrata Banik
2021-01-30mb/intel/adlrvp: Remove unnecessary whitespaceSubrata Banik
2021-01-28mb/intel/adlrvp: Remove ClkReq assignment for RP8Subrata Banik
2021-01-10mb/intel/adlrvp: Fix FW download failed for PEG 060, 010Subrata Banik
2021-01-10soc/intel/alderlake: Refactor SoC code to maintain CPU and PCH PCIE RPsSubrata Banik
2020-12-12mb/intel/adlrvp: Make CLKSRC and CLKREQ proper for PCIE RP8Subrata Banik
2020-12-02mb/intel/adlrvp: Replace tab by white space in devicetreeMeera Ravindranath
2020-12-01mainboard/intel/adlrvp: Enable PCH PCIe device over x1 slotSubrata Banik
2020-11-23mb/intel/adlrvp: Enable pre-boot display over HDMI-B portSubrata Banik
2020-11-08mb/intel/adlrvp: Refactor ADLRVP code to get rid of 'variants/baseboard'Subrata Banik