coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2022-12-05	nb/intel/i945: Remove apic 0 from devicetree	Arthur Heymans
2022-12-02	sb/intel/i82801gx: Use boolean for ide_enable_{primary,secondary}	Elyes Haouas
2022-12-01	nb/intel/i945: Hook up PCI domain and CPU bus ops to devicetree	Arthur Heymans
2020-03-29	drivers/intel/gma/acpi: Provide default definition for displays	Nico Huber
2019-11-12	sb/intel/i82801gx: Add common LPC decode code	Arthur Heymans
2019-07-20	mb/,sb/intel/i82801gx: Merge `ide_legacy_combined` into `sata_mode`	Nico Huber
2019-06-06	sb/intel/i82801gx: Detect if the southbridge supports AHCI	Arthur Heymans
2019-02-28	cpu/intel: Rename socket_mFCPGA478 to socket_m	Nico Huber
2018-11-12	mb//: Harmonise FD and devicetree on boards featuring ICH7	Arthur Heymans
2016-12-11	nb/intel/i945: Make pci_mmio_size a devicetree parameter	Arthur Heymans
2015-05-28	igd.asl rewrite	Vladimir Serbinenko
2014-11-04	i82801gx: Handle whole FADT in southbridge.	Vladimir Serbinenko
2014-05-20	mainboard/ibase/mb899: Indent devicetree.cb	Edward O'Callaghan
2013-02-14	sconfig: rename lapic_cluster -> cpu_cluster	Stefan Reinauer
2013-02-14	sconfig: rename pci_domain -> domain	Stefan Reinauer
2010-12-05	W83627DHG/W83627EHG fixups for virtual LDNs.	Uwe Hermann
2010-05-30	This patch adds support for mainboard iBASE:MB899	Bernhard M. Wiedemann