| Age | Commit message (Expand) | Author |
|---|---|---|
| 2019-01-09 | Veyron: fix sdram config for Hynix H9CCNNNBKTMLBR-NTD | Loop_Wu |
| 2018-10-31 | Veyron: add Hynix H9CCNNNBKTMLBR-NTD ddr with RAMID '00Z1' | Loop_Wu |
| 2017-03-07 | google/veyron: add K4B4G1646E-BYK0 ddr with ramid 000Z | Shunqian Zheng |
| 2017-03-07 | google/veyron_*: Add new Micron and Hynix modules | David Hendricks |
| 2016-11-03 | google/veyron*: add DDR configs for new samsung DDR | ZhengShunQian |
| 2016-01-21 | google/veyron_mickey: Update Hynix memory configuration | Lang Zhang |
| 2015-10-31 | tree: drop last paragraph of GPL copyright header | Patrick Georgi |
| 2015-08-28 | veyron: add Nanya NT5CC256M16DP sdram | jinkun.hong |
| 2015-06-05 | google/veyron_mickey: Add new mainboard | David Hendricks |
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index : coreboot.git | |
| my copy of coreboot | User & |
| summaryrefslogtreecommitdiff |