| Age | Commit message (Expand) | Author |
|---|---|---|
| 2016-01-22 | google/veyron_*: Add dual-rank 2GB Hynix module to SDRAM configs | David Hendricks |
| 2015-10-31 | tree: drop last paragraph of GPL copyright header | Patrick Georgi |
| 2015-08-28 | veyron: add Nanya NT5CC256M16DP sdram | jinkun.hong |
| 2015-05-21 | Remove address from GPLv2 headers | Patrick Georgi |
| 2015-04-22 | google/veyron_*: add ELPIDA F8132A3MA and FA232A2MA sdram | jinkun.hong |
| 2015-04-21 | veyron: add new SDRAM configuration with ram-code 1101b | ZhengShunQian |
| 2015-04-21 | veyron: Sync up SDRAM configurations | Julius Werner |
| 2015-04-15 | Danger: Apply differences between Brain and Danger | David Hendricks |
| 2015-04-15 | Danger: Initial mainboard import | David Hendricks |
 |
index : coreboot.git | |
| my copy of coreboot | User & |
| summaryrefslogtreecommitdiff |