| Age | Commit message (Expand) | Author |
|---|---|---|
| 2020-08-23 | soc/intel/cnl: Configure FSP option PcieRpSlotImplemented | Nico Huber |
| 2020-08-07 | soc/intel/cnl: Set Heci1Disable depending on devicetree config | Felix Singer |
| 2020-07-03 | mb/google/hatch: Allow USB2/3 wakeups to (un)plug events in Noibat | Edward O'Callaghan |
| 2020-06-17 | mb/google/puff: add MST and LSPCON details to variants devicetree | Shiyu Sun |
| 2020-06-14 | mb/google/hatch: Switch USB2 port1 and port3 on Noibat | Edward O'Callaghan |
| 2020-06-12 | mb/google/hatch: Remove unused USB2 port from Noibat | Edward O'Callaghan |
| 2020-06-12 | mb/google/puff: Update i2c[2] and i2c[3] rise and fall times | Sam McNally |
| 2020-06-01 | mb/google/hatch: Add Noibat variant | Edward O'Callaghan |
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index : coreboot.git | |
| my copy of coreboot | User & |
| summaryrefslogtreecommitdiff |