coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2020-05-26	cannonlake: update processor power limits configuration	Sumeet R Pawnikar
2020-05-26	intel/cannonlake: Implement PCIe RP devicetree update	Nico Huber
2020-05-18	src: Remove leading blank lines from SPDX header	Elyes HAOUAS
2020-05-11	treewide: Remove "this file is part of" lines	Patrick Georgi
2020-05-09	src/: Replace GPL boilerplate with SPDX headers	Patrick Georgi
2020-05-01	mb/google/hatch/vr/puff: Add psys_pmax calculation	Tim Chen
2020-04-30	mb/google/puff: update USB2 strength	Tim Chen
2020-04-24	mb/google/hatch: Add Kaisa variant specific DPTF parameters	Edward O'Callaghan
2020-04-23	mb/google/puff: Switch USB2 port1 and port3	Tim Chen
2020-04-21	mb/google/puff: configure USB PLD groups	Peter Marheine
2020-04-20	security/vboot, mb/google: Fix build errors	Patrick Georgi
2020-04-15	mb/google/hatch: Add Kaisa variant	Andrew McRae