coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2020-09-01	mb/google/puff: Convert ASL file to new DPTF dt impl	Edward O'Callaghan
2020-08-23	soc/intel/cnl: Configure FSP option PcieRpSlotImplemented	Nico Huber
2020-08-07	soc/intel/cnl: Set Heci1Disable depending on devicetree config	Felix Singer
2020-08-06	mainboard/google/puff: Remove second temp sensor	Andrew McRae
2020-07-20	mb/google/puff: update USB3 gen2 parameters	Tim Chen
2020-07-03	mb/google/hatch: Allow USB2/3 wakeups to (un)plug events in Faffy	Edward O'Callaghan
2020-07-02	mb/google/faffy: update DPTF parameters	Tim Chen
2020-06-28	mb/google/faffy: Enable USB2 port6	Tim Chen
2020-06-23	hatch: Create faffy variant	Edward O'Callaghan