| Age | Commit message (Expand) | Author |
|---|---|---|
| 2019-11-01 | soc/intel/{IA-CPU/SOC}: Move sleepstates.asl into southbridge/intel/common/acpi | Subrata Banik |
| 2019-04-29 | soc/intel/braswell: Move LPE ACPI code to mainboard | Frans Hendriks |
| 2019-03-08 | coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX) | Julius Werner |
| 2018-11-30 | cpu/intel/common: Use a common acpi/cpu.asl file | Arthur Heymans |
| 2018-11-23 | mb: Set coreboot as DSDT's manufacturer model ID | Elyes HAOUAS |
| 2018-11-21 | ACPI: Fix DSDT's revision field | Elyes HAOUAS |
| 2017-09-21 | google/terra: add new board as variant of cyan baseboard | Matt DeVillier |
| 2016-07-30 | chromeos mainboards: remove chromeos.asl | Aaron Durbin |
| 2016-01-29 | src/: Chmod 644 all .c, .h, .asl, .inc, .cb, .hex, & Kconfig files | Martin Roth |
| 2016-01-22 | google/cyan: Add Wifi regulatory method | Hannah Williams |
| 2015-10-31 | tree: drop last paragraph of GPL copyright header | Patrick Georgi |
| 2015-07-17 | mainboard/google: Add Braswell based Cyan board | Lee Leahy |
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index : coreboot.git | |
| my copy of coreboot | User & |
| summaryrefslogtreecommitdiff |