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path: root/src/mainboard/google/brya/variants/baseboard/devicetree.cb
AgeCommit message (Expand)Author
2021-04-28mb/google/brya: remove WLAN PCIE settingEric Lai
2021-04-22mb/google/brya: Enable display and DSP audio UPDSugnan Prabhu S
2021-04-16mb/google/brya: Configure TCSS OC pins for bryaMaulik V Vaghela
2021-04-05mb/google/brya: Enable south XHCI ports 1 and 2Furquan Shaikh
2021-03-22mb/google/brya: Enable S0ixSugnan Prabhu S
2021-03-15mb/google/brya: Remove BT PCI interface and add BT flagCliff Huang
2021-03-06mb/google/brya: Move GPE configuration to baseboard/devicetree.cbFurquan Shaikh
2021-03-05soc/intel/adl, mb/google/brya: Add IPU to devicetreeTim Wawrzynczak
2021-02-22mb/google/brya: Fix chip driver and HID for Cr50 TPMTim Wawrzynczak
2021-02-15mb/google/brya: Add EC I/O decode windowsTim Wawrzynczak
2021-02-15mb/google/brya: Enable cr50 supportTim Wawrzynczak
2021-02-05soc/intel/alderlake: Refactor PCIE port configEric Lai
2021-02-01mb/google/brya: Initiate peripheral busesEric Lai
2020-12-29Revert "mb/google/brya: Initiate peripheral buses"Felix Singer
2020-12-29mb/google/brya: Initiate peripheral busesEric Lai
2020-12-04mb/google/brya: Initiate device treeEric Lai
2020-11-22mb/google/brya: Add new google brya mainboardTim Wawrzynczak
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-16 15:33:35 +0000