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2024-09-30mb/google: Correct number of jacks in hda_verb.cNicholas Sudsgaard
This corrects the mismatch found in the verb tables of Monroe Chromebase and Link Chromebook. The verb data was not aligned to a multiple of 4, therefore an entry was repeated as padding. This was found due to the `_Static_assert()` from CB:84360 failing. TEST=Tested on LINK under Linux and Win11, audio working properly under both. Change-Id: Id377281af310642a6ba77e5a0002ca1dfca38827 Signed-off-by: Nicholas Sudsgaard <devel+coreboot@nsudsgaard.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/84414 Reviewed-by: Matt DeVillier <matt.devillier@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2024-08-09superio/ite,mb: Switch to new ITE GPIO driverMichał Żygowski
Refactor mainboards' code to use the new GPIO driver. TEST=Put Google Jecht to S3 sleep and check if the LED blinks. Change-Id: I707ee090ee2551b4935847e12ade678d36ff9302 Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com> Tested-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/83469 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
2024-06-07mb/**/hda_verb: Use `AZALIA_PIN_CFG_NC(0)`Angel Pons
Replace `0x411111f0` with `AZALIA_PIN_CFG_NC(0)`, which evaluates to the same value and conveys additional information to the reader. Done with a bulk search and replace operation. Change-Id: Ibd84daec017bc1ab1ee4edd906fda80231c134cc Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/82394 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
2021-03-22lynxpoint/broadwell: Rename LP GPIO config globalAngel Pons
Do not use the same name as the non-LP GPIO config. This allows checking at build-time that a mainboard uses the correct GPIO config format. Without this commit, there are no build-time errors when using the wrong format of GPIO config, but there would be undefined behavior at runtime. Tested by trying to build asrock/b85m_pro4 and hp/folio_9480m after toggling the `INTEL_LYNXPOINT_LP` Kconfig option (and trimming down the USB config arrays for asrock/b85m_pro4). In both cases, building failed because the necessary GPIO config global is not defined, as expected. Change-Id: Ib06507ef8179da22bdb27593daf972e788051f3a Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/51661 Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-07-14src: Remove unused 'include <types.h>'Elyes HAOUAS
Files found using: diff <(git grep -l '#include <types.h>' -- src/) <(git grep -l 'BIT(\|size_t\|wchar_t\|wint_t\|NULL\|DEVTREE_EARLY\|DEVTREE_CONST\|MAYBE_STATIC_NONZERO\|zeroptr\|int8_t\|int16_t\|int32_t\|int64_t\|intptr_t\|intmax_t\|s8\|u8\|s16\|u16\|s32\|u32\|s64\|u64\|INT8_MIN\|INT8_MAX\|INT16_MIN\|INT16_MAX\|INT32_MIN\|INT32_MAX\|INT64_MIN\|INT64_MAX\|INTMAX_MIN\|INTMAX_MAX\|bool\|true\|false\|cb_err\|CB_SUCCESS\|CB_ERR\|CB_ERR_ARG\|CB_CMOS_\|CB_KBD_\|CB_I2C_\|cb_err_t\|DIV_ROUND_CLOSEST\|container_of\|__unused\|alloca(\|ARRAY_SIZE\|ALIGN\|ALIGN_UP\|ALIGN_DOWN\|IS_ALIGNED\|__CMP_UNSAFE\|MIN_UNSAFE\|MAX_UNSAFE\|__CMP_SAFE\|__CMP\|MIN(\|MAX(\|ABS(\|IS_POWER_OF_2\|POWER_OF_2\|DIV_ROUND_UP\|SWAP(\|KiB\|MiB\|GiB\|KHz\|MHz\|GHz\|offsetof(\|check_member\|member_size' -- src/)|grep -v vendor |grep '<' Change-Id: I5d99d844cc58d80acb505d98da9d3ec76319b2eb Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41677 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-07-09mb/google/beltino: Put GPIOs in a C fileAngel Pons
This will allow dropping the pointer inside romstage_params. Change-Id: I536225351a0353298381c16cff25f39098c19bba Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/43101 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tristan Corrick <tristan@corrick.kiwi>
2020-06-20mb/google/beltino/**/hda_verb.c: Correct mic pin configsMatt DeVillier
Commit 0558d0c [mb/google/beltino/**/hda_verb.c: Correct pin configs] incorrectly flipped the mic pin configs for verb NIDs 0x18 and 0x19, so set them back to the correct values, which match the original Chromium sources (where the NID identifiers in the pin config comments were reversed, which was the source of the confusion originally. Test: build/boot panther and zako variants, verify mic attached to 3.5mm jack functional Change-Id: I172a0bb299049d113a0272ee9c790b25b6242cad Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/42499 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-05-11treewide: Remove "this file is part of" linesPatrick Georgi
Stefan thinks they don't add value. Command used: sed -i -e '/file is part of /d' $(git grep "file is part of " |egrep ":( */\*.*\*/\$|#|;#|-- | *\* )" | cut -d: -f1 |grep -v crossgcc |grep -v gcov | grep -v /elf.h |grep -v nvramtool) The exceptions are for: - crossgcc (patch file) - gcov (imported from gcc) - elf.h (imported from GNU's libc) - nvramtool (more complicated header) The removed lines are: - fmt.Fprintln(f, "/* This file is part of the coreboot project. */") -# This file is part of a set of unofficial pre-commit hooks available -/* This file is part of coreboot */ -# This file is part of msrtool. -/* This file is part of msrtool. */ - * This file is part of ncurses, designed to be appended after curses.h.in -/* This file is part of pgtblgen. */ - * This file is part of the coreboot project. - /* This file is part of the coreboot project. */ -# This file is part of the coreboot project. -# This file is part of the coreboot project. -## This file is part of the coreboot project. --- This file is part of the coreboot project. -/* This file is part of the coreboot project */ -/* This file is part of the coreboot project. */ -;## This file is part of the coreboot project. -# This file is part of the coreboot project. It originated in the - * This file is part of the coreinfo project. -## This file is part of the coreinfo project. - * This file is part of the depthcharge project. -/* This file is part of the depthcharge project. */ -/* This file is part of the ectool project. */ - * This file is part of the GNU C Library. - * This file is part of the libpayload project. -## This file is part of the libpayload project. -/* This file is part of the Linux kernel. */ -## This file is part of the superiotool project. -/* This file is part of the superiotool project */ -/* This file is part of uio_usbdebug */ Change-Id: I82d872b3b337388c93d5f5bf704e9ee9e53ab3a9 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41194 Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-04-06mb/google/beltino: Use SPDX for GPL-2.0-only filesAngel Pons
Done with sed and God Lines. Only done for C-like code for now. Change-Id: Ie7a2074c2319911395234e4ce8ec35b8209bcc01 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/40144 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2020-03-18mainboard/google: Remove copyright noticesPatrick Georgi
They're listed in AUTHORS and often incorrect anyway, for example: - What's a "Copyright $year-present"? - Which incarnation of Google (Inc, LLC, ...) is the current copyright holder? - People sometimes have their editor auto-add themselves to files even though they only deleted stuff - Or they let the editor automatically update the copyright year, because why not? - Who is the copyright holder "The coreboot project Authors"? - Or "Generated Code"? Sidestep all these issues by simply not putting these notices in individual files, let's list all copyright holders in AUTHORS instead and use the git history to deal with the rest. Change-Id: I09cc279b1f75952bb397de2c3f2b299255163685 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39607 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: David Hendricks <david.hendricks@gmail.com>
2020-02-24mb/google: Fix typosElyes HAOUAS
Change-Id: I77c33c19b56dc9bd54e7555ce59f6a07bde3dbb6 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39081 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2020-01-02mb/google/beltino/**/hda_verb.c: Correct pin configsAngel Pons
NIDs 0x18 and 0x19 are flipped, and the verbs for NID 0x1b are instead applied onto NID 0x1a. Fix that, so that it matches original Chromium sources for the boards. Change-Id: I20cc4b282602f8557fa4f25489adf899b7460a09 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/37852 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
2020-01-02mb/google/beltino/**/hda_verb.c: remove preprocessor guardsAngel Pons
These files are not headers. Change-Id: Ibe6c9a96c1c4b0952a8d03b7a8b17869a66511f2 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/37851 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
2020-01-02mb/**/hda_verb.{c,h}: use denary numerals for codec IDsAngel Pons
Denary, also known as "decimal" or "base 10," is the standard number system used around the world. Therefore, make use of it. Change-Id: I7f2937bb7715e0769db3be8cb30d305f9d78b6f8 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/37849 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
2019-12-16mb/google/beltino: Add VBTs for all variantsMatt DeVillier
Add VBTs for beltino variants, extracted from VGA BIOS from stock firmware images using intelvbttool, zero-padded to 0x11ff bytes to make the Intel BMP editor happy. Use a common VBT for all except monroe, since it differs as it has a built-in display (being a Chromebase vs Chromebox). Change-Id: I82afb20a5648695c2cd568384a26839ab28be3da Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/37733 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2019-11-28mainboard/google: Remove unused include <stdlib.h>Elyes HAOUAS
Change-Id: I9e71474bea61befd61900aff554f32f1bc782a77 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/33699 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
2018-06-04mb/google: Get rid of whitespace before tabElyes HAOUAS
Change-Id: I24fd33887152c12b9db9742af475115b02b31ff2 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/26622 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2017-08-25google/beltino: fix LED polarity for mccloud variantMatt DeVillier
The LED polarity was set incorrectly, fix using values derived from original Chromium sources: branch firmware-mccloud-5827.B, ToT src/mainboard/google/mccloud/smihandler.c src/mainboard/google/mccloud/romstage.c TEST: boot google/mccloud, observe power LED on normally, blinking in S3/S4, and off in S5. Change-Id: Ia1f63eebbccb48fcf8543188db390b23045d843e Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/21102 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
2016-12-08google/beltino, tidus: simplify led_power_on() functionMatt DeVillier
Simplify set_power_led() by consolidating switch and setting values as needed inline based on LED state. Remove unnecesary function param, includes for Tidus. Change-Id: I28e6fac5f8d7e2ff419002db714ce88697895faf Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/17744 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber <nico.h@gmx.de>
2016-12-07google/beltino: fix LED, simplify function for Tricky variantMatt DeVillier
Simplify set_power_led() by consolidating switch and setting values as needed inline based on LED state. Fix non-off LED polarity for Tricky using correct value from Chromium source TEST: power on Tricky, observe LED lit / solid Change-Id: I8bc7c4ae3f83d3f37b76fd5c90a4faed7057ebee Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/17719 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-11-24Add Haswell Chromeboxes/Chromebase using variant board schemeMatt DeVillier
Combine existing board google/panther with new ChromeOS devices mccloud, monroe, tricky, and zako, using their common reference board (beltino) as a base. Chromium sources used: firmware-mccloud-5827.B 65bfee7 [haswell: No need pre-graphics delay...] firmware-monroe-4921.B 1ac749d [Monroe: Disable KB/MS in ITE8772.] firmware-tricky-5829.B 2db5322 [haswell: No need pre-graphics delay...] firmware-zako-5219.B eacedef [haswell: No need pre-graphics delay...] Existing google/panther board will be removed in a subsequent commit. Variant setup modeled after google/reef Change-Id: I5d7e0c2551e8b0707841032460c35615cefb2886 Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/17329 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
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