| Age | Commit message (Expand) | Author |
|---|---|---|
| 2024-09-01 | tree: Use boolean for s0ix_enable | Elyes Haouas |
| 2022-11-25 | cpu/intel/haswell: Move chip_ops to cpu cluster | Arthur Heymans |
| 2022-08-14 | broadwell: Move some MRC/refcode settings to devicetree | Angel Pons |
| 2022-01-04 | sb/intel: Use `bool` for PCIe coalescing option | Angel Pons |
| 2021-01-24 | mb/google/auron: Use Haswell CPU code | Angel Pons |
| 2021-01-01 | nb/intel/hsw,soc/intel/{bdw,skl,apl},mb/*: unify dt panel settings | Michael Niewöhner |
| 2021-01-01 | soc/intel/bdw,nb/intel/hsw: convert panel delays to ms representation | Michael Niewöhner |
| 2020-10-30 | soc/intel/broadwell: Separate PCH in devicetree | Angel Pons |
| 2020-10-30 | mb/google/auron: Add SATA PCI device to overridetree | Angel Pons |
| 2020-10-27 | mb/google/auron: Prepare devicetree for PCH split | Angel Pons |
| 2020-09-08 | soc/intel/broadwell: Drop `gpu_panel_port_select` | Angel Pons |
| 2020-04-03 | mb/google/auron: Convert variants to use override devicetree | Matt DeVillier |
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index : coreboot.git | |
| my copy of coreboot | User & |
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