Age | Commit message (Expand) | Author |
2022-12-05 | nb/intel/x4x: Remove apic 0 from devicetree | Arthur Heymans |
2022-12-05 | cpu/intel/speedstep: Have nb and sb code provide c5/c6/slfm | Arthur Heymans |
2022-12-02 | sb/intel/i82801gx: Use boolean for ide_enable_{primary,secondary} | Elyes Haouas |
2022-12-01 | nb/intel/x4x: Hook up PCI domain and CPU bus ops to devicetree | Arthur Heymans |
2020-06-03 | mb/gigabyte/ga-g41m-es2l: Remove MEI PCI devices from devicetree | Arthur Heymans |
2020-06-03 | mb/gigabyte/ga-g41m-es2l: Add PEG to devicetree | Arthur Heymans |
2020-05-11 | treewide: Remove "this file is part of" lines | Patrick Georgi |
2020-05-10 | src/mainboard: Replace GPLv2 long form headers with SPDX header | Elyes HAOUAS |
2020-03-18 | mainboard/[g-p]*: Remove copyright notices | Patrick Georgi |
2020-01-05 | mb/gigabyte/ga-g41m-es2l/devicetree.cb: Indent with tabs | Angel Pons |
2019-11-12 | sb/intel/i82801gx: Add common LPC decode code | Arthur Heymans |
2019-07-20 | mb/,sb/intel/i82801gx: Merge `ide_legacy_combined` into `sata_mode` | Nico Huber |
2019-06-06 | sb/intel/i82801gx: Detect if the southbridge supports AHCI | Arthur Heymans |
2019-06-05 | mb/*/devicetree.cb: Remove unavailable PCIe ports | Arthur Heymans |
2019-01-08 | mb/{ga-g41m-es2l,d945gclf,rk886ex}: Fix devicetree | Arthur Heymans |
2018-11-12 | mb/*/*: Harmonise FD and devicetree on boards featuring ICH7 | Arthur Heymans |
2018-06-04 | mb/gigabyte: Get rid of whitespace before tab | Elyes HAOUAS |
2017-10-22 | superio/ite/common: Add temperature offset | Vagiz Trakhanov |
2016-11-28 | mb/gigabyte/ga-g41m-es2l: Tie in configuration for SuperIO EC | Damien Zammit |
2016-09-09 | mb/gigabyte/ga-g41m-es2l: Remove PCI disable on PEG bridge | Damien Zammit |
2016-05-31 | mb/gigabyte/ga-g41m-es2l: Fix ACPI IRQ settings for SATA | Damien Zammit |
2016-01-29 | mb/gigabyte/ga-g41m-es2l: Remove copy-pasted cstates | Damien Zammit |
2015-12-30 | gigabyte/ga-g41m-es2l: Add mainboard | Damien Zammit |