| Age | Commit message (Expand) | Author |
|---|---|---|
| 2019-11-12 | sb/intel/i82801gx: Add common LPC decode code | Arthur Heymans |
| 2019-07-20 | mb/,sb/intel/i82801gx: Merge `ide_legacy_combined` into `sata_mode` | Nico Huber |
| 2019-06-06 | sb/intel/i82801gx: Detect if the southbridge supports AHCI | Arthur Heymans |
| 2018-11-12 | mb/*/*: Harmonise FD and devicetree on boards featuring ICH7 | Arthur Heymans |
| 2017-10-22 | superio/ite/common: Add temperature offset | Vagiz Trakhanov |
| 2016-12-11 | nb/intel/i945: Make pci_mmio_size a devicetree parameter | Arthur Heymans |
| 2016-11-28 | mb/gigabyte/ga-945gcm-s2l: Configure SuperIO EC | Arthur Heymans |
| 2016-11-08 | mb/gigabyte/ga-945gcm-s2l: add mainboard | Arthur Heymans |
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index : coreboot.git | |
| my copy of coreboot | User & |
| summaryrefslogtreecommitdiff |