coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2020-09-12	include/console/uart: make index parameter unsigned	Felix Held
2020-05-11	treewide: Remove "this file is part of" lines	Patrick Georgi
2020-04-04	mainboard/emulation: Use SPDX for GPL-2.0-only files	Angel Pons
2020-03-18	mainboard/[a-f]*: Remove copyright notices	Patrick Georgi
2019-06-28	mb/emulation/qemu-riscv: Use generic 8250 uart driver	Patrick Rudolph
2019-03-04	arch/io.h: Drop unnecessary include	Kyösti Mälkki
2019-01-26	mb/qemu-riscv: update to match current qemu version	Philipp Hug
2015-10-31	tree: drop last paragraph of GPL copyright header	Patrick Georgi
2015-05-21	Remove address from GPLv2 headers	Patrick Georgi
2015-04-17	uart: pass register width in the coreboot table	Vadim Bendebury
2014-12-04	RISCV: get RISCV to build again	Ronald G. Minnich
2014-12-01	Add UCB RISCV support for architecture, soc, and emulation mainboard..	Ronald G. Minnich