| Age | Commit message (Expand) | Author |
|---|---|---|
| 2019-08-03 | mb/emulation/qemu-riscv: Add opensbi support | Patrick Rudolph |
| 2019-07-30 | mb/emulation/qemu-riscv: Protect CBFS from payload loader | Patrick Rudolph |
| 2019-06-21 | mb/emulation/qemu-riscv: Support arbitrary ROM sizes | Patrick Rudolph |
| 2019-01-26 | mb/qemu-riscv: update to match current qemu version | Philipp Hug |
| 2018-04-27 | RISC-V boards: Remove PAGETABLES section from memlayout.ld | Jonathan Neuschäfer |
| 2016-10-24 | RISCV: Clean up the common architectural code | Ronald G. Minnich |
| 2015-10-31 | tree: drop last paragraph of GPL copyright header | Patrick Georgi |
| 2015-06-08 | Remove empty lines at end of file | Elyes HAOUAS |
| 2015-05-21 | Remove address from GPLv2 headers | Patrick Georgi |
| 2015-04-06 | New mechanism to define SRAM/memory map with automatic bounds checking | Julius Werner |
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index : coreboot.git | |
| my copy of coreboot | User & |
| summaryrefslogtreecommitdiff |