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While restructuring the mainboard directory, it was forgotten to add the
variant specific romstage.c to the build. Therefore, add romstage.c to
the Makefile fixing the raminit.
Change-Id: I7afbf1574803128f7d62592eed2398c945334757
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45928
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Change-Id: Idcaedd3d5b7e465644f79e5a882e42eff040fdbd
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45884
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
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PcieRpSlotImplemented should only be set to 1 for PCIe ports
implementing a PCIe slot. Drop it for the on-board card reader.
Change-Id: I22628b4d4a7e317a01e46a61b5cd7bb9ebf548a0
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45776
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
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Change-Id: Ibb46bbf0c889bb8b3fd1a4c0331dc719baffc7a2
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45678
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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In addition to CB:45664, rename clevo/l140cu to clevo/cml-u being able
to add more variants under a generic mainboard later.
Change-Id: I9c16e24830ebb80752df302aa2e63d9df8edad95
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45665
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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