coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2022-11-30	nb/intel/sandybridge: Add a chipset devicetree	Arthur Heymans
2022-08-13	src/mb: Update unlicensable files with the CC-PDDC SPDX ID	Martin Roth
2021-07-26	mb/*: Specify type of `MAINBOARD_PART_NUMBER` once	Angel Pons
2021-07-26	mb/*: Specify type of `MAINBOARD_DIR` once	Angel Pons
2021-06-07	bd82x6x boards: Drop redundant `c2_latency`	Angel Pons
2021-04-05	sandybridge boards: Drop default `pci_mmio_size`	Angel Pons
2021-02-03	mb/biostar/th61-itx/early_init.c: Clean includes	Elyes HAOUAS
2021-01-27	ACPI: Add top-level ASL	Kyösti Mälkki
2021-01-10	mb/x/acpi_tables: Rename to mainboard_fill_gnvs()	Kyösti Mälkki
2021-01-06	cpu/intel/model_206ax: Rename `cX_acpower` options	Angel Pons
2021-01-06	cpu/intel/model_206ax: Unify ACPI C-state options	Angel Pons
2020-11-23	mb/**/cmos.layout: Indent everything with tabs	Angel Pons
2020-10-13	{src/mb,util/autoport}: Use macro for DSDT revision	Elyes HAOUAS
2020-08-31	mb/biostar: Drop unneeded empty lines	Elyes HAOUAS
2020-07-21	mb/biostar: Add TH61-ITX port	Mate Kukri