coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2021-10-05	src/mainboard to src/security: Fix spelling errors	Martin Roth
2021-09-08	mb/amd/{bilby,mandolin}: Turn empty `chip` entry into comment	Nico Huber
2021-08-30	mb/(amd,google): Remove spi configuration from devicetree	Martin Roth
2021-06-17	soc/amd/picasso: introduce and use devicetree aliases for UART0-3	Felix Held
2021-06-01	mainboards using soc/amd/picasso: use aliases for remaining PCIe devices	Felix Held
2021-06-01	mainboards using soc/amd/picasso: use aliases for PCIe devices on bus 0	Felix Held
2021-06-01	soc/amd/picasso: introduce and use chipset device tree	Felix Held
2021-05-28	mb/amd/bilby,cereme,mandolin: change PSPP policy to balanced	Felix Held
2021-05-27	soc/amd/picasso: add devicetree setting for PSPP policy	Felix Held
2021-05-06	soc/amd/common/espi,mb/: Allow configuring open drain ALERT#	Raul E Rangel
2021-04-29	soc/amd/common/acp: Move Audio Co-processor driver to common	Karthikeyan Ramasubramanian
2021-02-12	soc/amd: Move fadt device tree settings into common_config	Raul E Rangel
2020-12-04	mb/amd/mandolin: Unify devicetree formatting for 00:14 devices	Paul Menzel
2020-11-23	mb/google/zork: correct USB2 phy TXVREFTUNE0 parameter name	Kevin Chiu
2020-09-30	mb/amd: Add Pollock CRB Cereme as Mandolin variant	Felix Held