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AgeCommit message (Expand)Author
2013-04-03intel/microcode.h: Fix typo in comment: micr*o*codePaul Menzel
2013-03-19intel microcode: split up microcode loading stagesAaron Durbin
2013-02-11Intel: Replace MSR 0xcd with MSR_FSB_FREQPatrick Georgi
2013-02-09speedstep: Deduplicate some MSR identifiersPatrick Georgi
2012-11-05Overhaul speedstep codeNico Huber
2012-11-01Merge cpu/intel/acpi.h into cpu/intel/speedstep.hNico Huber
2012-09-05buildsystem: Make CPU microcode updating more configurableAlexandru Gagniuc
2012-07-24Add code to read Intel microcode from CBFSVadim Bendebury
2012-07-02Intel CPUs: execute microcode update only once per coreKyösti Mälkki
2012-04-26Revamp Intel microcode update codeStefan Reinauer
2012-04-06Fixes and Sandybridge support for lapic cpu initStefan Reinauer
2012-04-03Add support for Intel Turbo Boost featureStefan Reinauer
2011-08-04cpu/intel/slot_1: Init L2 cache on SECC(2) CPUs.Keith Hui
2010-12-11factor out cpu power management base into a separate file. And fix a bug inStefan Reinauer
2010-11-18For completeness sake: License header.Patrick Georgi
2010-11-17Move Intel power management related defines to some central location.Patrick Georgi
2009-01-20fix compiler warnings (trivial)Stefan Reinauer
2004-10-14- Renamed cpu header filesEric Biederman
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