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path: root/src/include/cpu/intel/speedstep.h
AgeCommit message (Expand)Author
2022-12-05cpu/intel/speedstep: Have nb and sb code provide c5/c6/slfmArthur Heymans
2020-09-14src/include: Drop unneeded empty linesElyes HAOUAS
2020-05-11treewide: Remove "this file is part of" linesPatrick Georgi
2020-04-05src/include: Use SPDX for GPL-2.0-only filesAngel Pons
2020-03-17src (minus soc and mainboard): Remove copyright noticesPatrick Georgi
2018-10-11src: Move common IA-32 MSRs to <cpu/x86/msr.h>Elyes HAOUAS
2018-10-05src: Fix MSR_PKG_CST_CONFIG_CONTROL register nameElyes HAOUAS
2017-12-11intel: Use MSR_EBC_FREQUENCY_ID instead of 0x2cElyes HAOUAS
2017-11-30intel: Replace msr(0x198) with msr(IA32_PERF_STATUS)Elyes HAOUAS
2016-11-09cpu/intel: Add MSR to support enabling turbo frequencyShaunak Saha
2015-10-31tree: drop last paragraph of GPL copyright headerPatrick Georgi
2015-05-21Remove address from GPLv2 headersPatrick Georgi
2015-02-16acpi: Generate valid ACPI processor objectsTimothy Pearson
2013-05-10Drop prototype guarding for romccStefan Reinauer
2013-02-11Intel: Replace MSR 0xcd with MSR_FSB_FREQPatrick Georgi
2013-02-09speedstep: Deduplicate some MSR identifiersPatrick Georgi
2012-11-05Overhaul speedstep codeNico Huber
2012-11-01Merge cpu/intel/acpi.h into cpu/intel/speedstep.hNico Huber
2012-04-06Fixes and Sandybridge support for lapic cpu initStefan Reinauer
2010-12-11factor out cpu power management base into a separate file. And fix a bug inStefan Reinauer
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