| Age | Commit message (Expand) | Author |
|---|---|---|
| 2015-05-21 | Remove address from GPLv2 headers | Patrick Georgi |
| 2011-08-04 | cpu/intel/slot_1: Init L2 cache on SECC(2) CPUs. | Keith Hui |
 |
index : coreboot.git | |
| my copy of coreboot | User & |
| summaryrefslogtreecommitdiff |
|
index : coreboot.git | |
| my copy of coreboot | User & |
| summaryrefslogtreecommitdiff |
| Age | Commit message (Expand) | Author |
|---|---|---|
| 2015-05-21 | Remove address from GPLv2 headers | Patrick Georgi |
| 2011-08-04 | cpu/intel/slot_1: Init L2 cache on SECC(2) CPUs. | Keith Hui |