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path: root/src/ec/starlabs/merlin/variants
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2023-04-04ec/starlabs/merlin: Add support for the ITE mirror flagSean Rhodes
When enabled, the EC will mirror the firmware contained inside the coreboot ROM. This allows it to be updated at the same time as coreboot. Enable the mirror flag if the installed EC firmware does not match the target version or if a CMOS option, "manual_mirror_flag" is set. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I377abbb37dc4d3e535e518a73e73969b25967daa Reviewed-on: https://review.coreboot.org/c/coreboot/+/73044 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2023-03-09Revert "ec/starlabs/merlin: Add support for enabling the mirror flag"Sean Rhodes
This reverts commit b42ca4d0b2fafe7214396d30a1a833ac33cf85bc. Reason for revert: The mirror flag "0x01" is mirror once, which relies on the EC remembering that it's been mirrored. However, the EC forgets this if it's been without power for 20 minutes or so. Even if power is connected then, it'll instantly try to mirror and it can't charge whilst doing it. It can either result in incomplete EC firmware, or a loop where it's constantly trying to mirror. Change-Id: I79da9143cc63459e7e29431eff2cb14200424b37 Signed-off-by: Sean Rhodes <sean@starlabs.systems> Reviewed-on: https://review.coreboot.org/c/coreboot/+/72678 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2022-12-19ec/starlabs/merlin: Add EC related files for Cezanne laptopsSean Rhodes
Add EC memory layout and Q events for AMD Cezanne based boards, the "StarBook Mk VI" and "StarFighter Mk I", which both use the ITE 5570E. Change-Id: I87806b830b3d58a6ce3b89f45b5a07f4502a87f3 Signed-off-by: Sean Rhodes <sean@starlabs.systems> Reviewed-on: https://review.coreboot.org/c/coreboot/+/68333 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-11-11ec/starlabs/merlin: Rename the Cezanne EC codeSean Rhodes
This EC code is for the Byte, a Cezanne Mini PC. The EC is different to the Cezanne StarBook Mk VI. Rename it to `-desktop`, so the laptop variant becomes the primary. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I25f812cb1c6cefca1ebbe3bee5d20cf521dd60af Reviewed-on: https://review.coreboot.org/c/coreboot/+/68319 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-11-07ec/starlabs/merlin: Add support for enabling the mirror flagSean Rhodes
When enabled, the EC will mirror the firmware contained inside the coreboot ROM. This allows it to be updated at the same time as coreboot. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: Ief088e012b65be32648f581fc3190e1000bca241 Reviewed-on: https://review.coreboot.org/c/coreboot/+/68938 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2022-10-07ec/starlabs/merlin: Add EC related files for Alder Lake boardsSean Rhodes
Add EC memory layout and Q events for Intel Alder Lake based boards, the "StarBook Mk VI" and "StarFighter Mk I", which both use the ITE 5570E. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I8cea386ba91d076084002738fe7041834deea311 Reviewed-on: https://review.coreboot.org/c/coreboot/+/67398 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2022-10-06ec/starlabs/merlin: Add support for enabling fast chargeSean Rhodes
The Lite Mk IV's can enable fast charging, with support up to 100W via USB-C PD 3.0. The default for this is disabled, as it can reduce battery life span. This patch adds the option to enable fast charging, by writing 0x01 to 0x18 in the EC space. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: Ie01eb59d3f41b242190973fd9c58b1494320c12a Reviewed-on: https://review.coreboot.org/c/coreboot/+/66298 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2022-08-26ec/starlabs/merlin/cml: Correct the offset for Max ChargeSean Rhodes
The offset for Max Charge is located at 0x1a, so correct this in the definitions and EC memory ACPI. Change-Id: I92cc452d1189e62db78aed787f2de65fd5096564 Signed-off-by: Sean Rhodes <sean@starlabs.systems> Reviewed-on: https://review.coreboot.org/c/coreboot/+/66962 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2022-05-28ec/starlabs/merlin/kbl: Add required headers for dead_code_tSean Rhodes
Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: Ia6c3ba80d5e6ac3d4fd8a935732ef7e32cf33998 Reviewed-on: https://review.coreboot.org/c/coreboot/+/64718 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin L Roth <gaumless@tutanota.com>
2022-05-28ec/starlabs/merlin/glk: Add Trackpad enable/disable Q eventsSean Rhodes
Add Q60 and Q61 events to disable or enable the trackpad. The support for this Q event was added in Star Labs EC version 1.11 Add Q events Q60 and Q61 which are bound to the F10 key. The event is select based on the value of 0x14, 0x11 will send Q60 and 0x22 will send Q61. Q60 will pull GPIO_177 to low, consequently disabling the trackpad and Q61 will reset it to the default configuration. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I091b0eb268d4d6d2109559765be71e2746b85f54 Reviewed-on: https://review.coreboot.org/c/coreboot/+/64465 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
2022-05-25ec/starlabs/merlin/glk: Correct offset of USCISean Rhodes
Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I54b01b1974822c155cb49634fff8616326d55705 Reviewed-on: https://review.coreboot.org/c/coreboot/+/64380 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
2022-05-12ec/starlabs/merlin: Remove offset for Max Charge when not supportedSean Rhodes
Set the MAX_CHARGE offset to dead_code_t for boards that don't support the function. The avoids erroneous values being written to the EC. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I306c8a60818b780ef3bfb842e7fcc4d8500d6b03 Reviewed-on: https://review.coreboot.org/c/coreboot/+/64092 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
2022-04-06ec/starlabs/merlin: Add EC related files for Cezanne boardsSean Rhodes
Add EC memory layout and Q events for AMD Cezanne based boards, "Byte" and "Fighter", which both use the ITE 5570E. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I3f837263d24e6b642cf33fd2995d8c90529706f6 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62994 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-04-06ec/starlabs/merlin: Correct Q event for CPU DN SPEEDSean Rhodes
Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: Ieea1c8d0923f6ea6b13cf76525c9c4c686a92c40 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62901 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2022-04-04ec/starlabs/merlin: Remove comment about OPWESean Rhodes
OPWE offset didn't exist, but it does now so remove the comment about this. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I4a1310c779002dfb00d01a22437ea223bb406609 Reviewed-on: https://review.coreboot.org/c/coreboot/+/63171 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2022-03-30ec/starlabs/merlin: Add GLKR variantSean Rhodes
Add GLKR (N5030) Lite Mk IV variant Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I1e17130caa16a605d0d3207d41527df3db6ada81 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62705 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2022-03-21ec/starlabs/merlin: Don't store EC values on changeSean Rhodes
Since CB:62741, the EC values are backed up to the CMOS when entering S3, S4 and S5. Consequently, they don't need to be stored when they're changed. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: If0ea392afae4a4d3c605cdea3c5896fbff606215 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62742 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2022-03-09ec/starlabs: Correct Keyboard Backlight offsets for GLKSean Rhodes
Correct the offsets used for the keyboard backlight control: ECRAM_KBL_STATE 0x19 ECRAM_KBL_BRIGHTNESS 0x18 Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I23bac43301635e6b18f1cbd28311e7210b049c70 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62126 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Andy Pont <andy.pont@sdcsystems.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2022-02-15ec/starlabs/merlin: Adjust Keyboard Backlight configurationSean Rhodes
* Change TGL Q Event for Keyboard Backlight to Q4A * Change enabled value to 0xdd Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: Ibae95e458f14b9d03ff50cb6222b336fd015d0e6 Reviewed-on: https://review.coreboot.org/c/coreboot/+/60303 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
2022-01-07ec/starlabs/merlin: Unify EC and CMOS namesSean Rhodes
End all CMOS variable with a C and EC variables with an E. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: Ie0fab6b9dcd805f7b8c9bf8f14b0a799d8f396c8 Reviewed-on: https://review.coreboot.org/c/coreboot/+/60709 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
2021-12-29ec/starlabs/merlin: Use Printf() for debug printsFelix Singer
Built with BUILD_TIMELESS=1 and coreboot.rom remains identical. Change-Id: Ib59cba7bf553e8323c20fd9aa3474f3ecccf465a Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60380 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2021-11-22ec/starlabs: Add standardised ITE EC supportSean Rhodes
Add EC support that supports different Q Events and EC memory. Created from the ITE IT5570E and IT8987E datasheets, all using data port 0x4e. Tested with Ubuntu 20.04.3 and Windows 10 on: * StarBook Mk V (TGL + IT5570E): * ITE Firmware 1.00 * Merlin Firmware 1.00 * LabTop Mk IV (CML + IT8987E): * ITE Firmware 1.04 * LabTop Mk III (KBL + IT8987E): * ITE Firmware 3.12 Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I8023c26de23c874c84106fda96e64dcfa0c5ba32 Reviewed-on: https://review.coreboot.org/c/coreboot/+/58343 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Andy Pont <andy.pont@sdcsystems.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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