index
:
coreboot.git
macbookair5_2
macbookpro10_1
main
master
mbp101_medisable
mbp101_medisable_1
mbp82
x230
my copy of coreboot
User &
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
src
/
drivers
/
intel
/
fsp1_0
Age
Commit message (
Expand
)
Author
2015-12-03
intel/fsp: Add post codes for FSP phases
Duncan Laurie
2015-11-23
fsp1_0: Update Kconfig for symbols not depending on FSP binary
Martin Roth
2015-11-16
intel/fsp1_0: Use dummy microcode when calling FSP TempRamInit
York Yang
2015-10-31
tree: drop last paragraph of GPL copyright header
Patrick Georgi
2015-10-08
fsp1_0: Fix broken logic when searching for FSP
Werner Zeh
2015-10-06
fsp/cache_as_ram.inc and boards: Fix incorrect usage of POST_IO
Alexandru Gagniuc
2015-09-30
cpu: microcode: Use microcode stored in binary format
Alexandru Gagniuc
2015-09-30
intel/fsp1_0: Declare microcode to be size 0 if it doesn't exist
Patrick Georgi
2015-09-29
intel/fsp1.0: Get size of microcode during build time
Werner Zeh
2015-09-07
intel: Do not hardcode the position of mrc.cache
Alexandru Gagniuc
2015-09-04
x86: remove cpu_incs as romstage Make variable
Aaron Durbin
2015-06-27
Kconfig: Remove unnecessary and incorrect MRC_CACHE symbols
Martin Roth
2015-06-08
Remove empty lines at end of file
Elyes HAOUAS
2015-06-02
cbfs: new API and better program loading
Aaron Durbin
2015-05-21
Remove address from GPLv2 headers
Patrick Georgi
2015-05-02
drivers/intel/fsp1_0: Remove executable bit from C files
Paul Menzel
2015-04-28
fsp platforms: consolidate FspNotify calls
Martin Roth
2015-04-24
driver/intel/fsp: Correct the fastboot data (MRC data) printing length
York Yang
2015-04-24
fsp: Move fsp to fsp1_0
Marc Jones