| Age | Commit message (Expand) | Author |
|---|---|---|
| 2018-12-28 | intel/fsp1_0/cache_as_ram.inc: Use tabs instead of white spaces | Elyes HAOUAS |
| 2018-05-31 | {cpu,drivers,nb,soc}/intel: Use CACHE_ROM_BASE where appropriate | Nico Huber |
| 2017-09-13 | fsp1_0/fsp_util: Rename global symbol find_fsp | Damien Zammit |
| 2016-06-17 | Fix some cbmem.h includes | Kyösti Mälkki |
| 2015-12-06 | Remove #ifdef checks on Kconfig symbols | Martin Roth |
| 2015-12-03 | intel/fsp: Add post codes for FSP phases | Duncan Laurie |
| 2015-11-16 | intel/fsp1_0: Use dummy microcode when calling FSP TempRamInit | York Yang |
| 2015-10-31 | tree: drop last paragraph of GPL copyright header | Patrick Georgi |
| 2015-10-08 | fsp1_0: Fix broken logic when searching for FSP | Werner Zeh |
| 2015-10-06 | fsp/cache_as_ram.inc and boards: Fix incorrect usage of POST_IO | Alexandru Gagniuc |
| 2015-06-08 | Remove empty lines at end of file | Elyes HAOUAS |
| 2015-05-21 | Remove address from GPLv2 headers | Patrick Georgi |
| 2015-04-24 | fsp: Move fsp to fsp1_0 | Marc Jones |
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index : coreboot.git | |
| my copy of coreboot | gitea |
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