coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2019-01-15	vendorcode/intel/fsp1_0/broadwell_de: Use FSP from 3rdparty/fsp	Patrick Rudolph
2016-05-11	util/cbfstool: Allow xip/non-xip relocation for FSP component	Furquan Shaikh
2016-04-19	kbuild: Allow drivers to fit src/drivers/[X]/[Y]/ scheme	Stefan Reinauer
2016-02-10	intel/fsp1_0: Allow the MRC cache to live in a FMAP region	Ben Gardner
2015-11-16	intel/fsp1_0: Use dummy microcode when calling FSP TempRamInit	York Yang
2015-10-31	tree: drop last paragraph of GPL copyright header	Patrick Georgi
2015-09-30	cpu: microcode: Use microcode stored in binary format	Alexandru Gagniuc
2015-09-30	intel/fsp1_0: Declare microcode to be size 0 if it doesn't exist	Patrick Georgi
2015-09-29	intel/fsp1.0: Get size of microcode during build time	Werner Zeh
2015-09-07	intel: Do not hardcode the position of mrc.cache	Alexandru Gagniuc
2015-09-04	x86: remove cpu_incs as romstage Make variable	Aaron Durbin
2015-05-21	Remove address from GPLv2 headers	Patrick Georgi
2015-04-24	fsp: Move fsp to fsp1_0	Marc Jones