| Age | Commit message (Expand) | Author |
|---|---|---|
| 2019-02-11 | soc/intel/fsp_broadwell_de: Move FSP_DEBUG_LEVEL option here | Nico Huber |
| 2019-01-15 | vendorcode/intel/fsp1_0/broadwell_de: Use FSP from 3rdparty/fsp | Patrick Rudolph |
| 2019-01-14 | intel/fsp1_0: Add option to select FSP debug level | Patrick Rudolph |
| 2018-05-31 | cpu/x86/mtrr: Get rid of CACHE_ROM_SIZE_OVERRIDE | Nico Huber |
| 2016-02-10 | intel/fsp1_0: Allow the MRC cache to live in a FMAP region | Ben Gardner |
| 2015-11-23 | fsp1_0: Update Kconfig for symbols not depending on FSP binary | Martin Roth |
| 2015-10-31 | tree: drop last paragraph of GPL copyright header | Patrick Georgi |
| 2015-09-07 | intel: Do not hardcode the position of mrc.cache | Alexandru Gagniuc |
| 2015-06-27 | Kconfig: Remove unnecessary and incorrect MRC_CACHE symbols | Martin Roth |
| 2015-05-21 | Remove address from GPLv2 headers | Patrick Georgi |
| 2015-04-24 | fsp: Move fsp to fsp1_0 | Marc Jones |
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index : coreboot.git | |
| my copy of coreboot | User & |
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