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cache_as_ram.S
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Commit message (
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Author
2021-01-07
arch/x86: Move prologue to .init section
Kyösti Mälkki
2020-05-11
treewide: Remove "this file is part of" lines
Patrick Georgi
2020-04-06
src/drivers: Use SPDX for GPL-2.0-only files
Angel Pons
2019-12-11
AGESA, binaryPI: implement C bootblock
Michał Żygowski
2019-11-30
AGESA,binaryPI: Add compatibility wrapper for romstage entry
Kyösti Mälkki
2019-11-30
AGESA,binaryPI: Fix stack location on entry to romstage
Michał Żygowski
2019-11-30
AGESA,binaryPI: Remove __x86_64__ long mode in CAR
Michał Żygowski
2019-11-30
AGESA,binaryPI: Remove redundant SSE enable
Michał Żygowski
2019-11-27
AGESA,binaryPI: Remove early_all_cores()
Kyösti Mälkki
2019-11-27
binaryPI: Drop CAR teardown without POSTCAR_STAGE
Kyösti Mälkki
2019-10-22
AUTHORS: Move src/drivers/[a*-i*] copyrights into AUTHORS file
Martin Roth
2019-03-08
coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)
Julius Werner
2018-12-28
drivers/amd/agesa/cache_as_ram.S: Fix coding style
Elyes HAOUAS
2017-09-26
AGESA: Move API interface under drivers/
Kyösti Mälkki