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AgeCommit message (Expand)Author
2014-08-12Exynos5420: Remove code for enabling read levelingDavid Hendricks
2014-08-12exynos5: Refactor board-specific parts out of USB PHY codeJulius Werner
2014-08-12exynos5420: ddr3: Cleanup init to use constants for directcmdDavid Hendricks
2014-08-12exynos5420: Alter init sequence as per recommendationDavid Hendricks
2014-08-12exynos5420: Make USB A-A booting work with early data cacheJulius Werner
2014-08-12armv7/Makefile.inc, cpu/Makefile.inc: align output of printfDaniele Forsi
2014-08-12cpu/intel/XXX/acpi.c: Fix coding style violationMartin Roth
2014-08-11x86/smm/smihandler.c: break case in switchPatrick Georgi
2014-08-11coreboot classes: Add dynamic classes to corebootFurquan Shaikh
2014-08-10exynos5420: Tighten up displayport timing loopsRonald G. Minnich
2014-08-10armv7: Support stack dump after exceptionsJulius Werner
2014-08-10model_106cx: don't blindly set Kconfig settingsAaron Durbin
2014-08-10exynos: Get rid of the unused reset.c.Gabe Black
2014-08-10cpu/intel/model_1067x: avoid null-pointer dereferencePatrick Georgi
2014-08-09cpu/amd/geode_lx: Trivial - remove useless commentEdward O'Callaghan
2014-08-09cpu/amd/geode_lx: Reduce fancy ASCII art with embedded commentsEdward O'Callaghan
2014-08-09cpu/amd/geode_lx/cache_as_ram.inc: Trivial - Fix indent with tabsEdward O'Callaghan
2014-08-09Exynos5420: clean up SPI driverStefan Reinauer
2014-08-08exynos5420: Implement support to boot with USB A-A firmware uploadJulius Werner
2014-08-07Exynos 5420: skip the EDID read if there is already an EDID.Ronald G. Minnich
2014-08-07exynos5420: Set the CLK_DIV_CPERI1 value as per manualDavid Hendricks
2014-08-07exynos: Set up caching in the bootblock.Gabe Black
2014-08-07Exynos5420: invoke the cooperative threading in udelayRonald G. Minnich
2014-08-06Exynos5: Remove unneeded USB delaysStefan Reinauer
2014-08-06Exynos5420: tighten up display port delaysRonald G. Minnich
2014-08-06exynos5420: Fix mmc clock source.Hung-Te Lin
2014-08-06Set armv7 up for cpu_info to work as on x86 (so threads can work)Ronald G. Minnich
2014-08-05exynos5420: get rid of old exynos5420_config_l2_cache()David Hendricks
2014-08-04cpu/intel: Fix out-of-bounds read due to off-by-one in conditionEdward O'Callaghan
2014-08-03cpu/x86/lapic/lapic.c: trivial: fix comment on #elseDaniele Forsi
2014-07-31timer: Add functions to initialize absolute timer structures.Gabe Black
2014-07-31armv7/exynos5420: Configure CPU cores for kernel to enable SMP.Hung-Te Lin
2014-07-30model_206ax_init.c: Trivial - fix indentEdward O'Callaghan
2014-07-30cpu/intel: Add fsp version of model 406dx (Rangeley / Atom C2000)Martin Roth
2014-07-30model_fxx/processor_name.c, hudson/lpc.c: add missing break statementsDaniele Forsi
2014-07-30cpu/intel/model_2065x/model_2065x_init.c: Remove dead codeEdward O'Callaghan
2014-07-29Uniformly spell frequency unit symbol as HzElyes HAOUAS
2014-07-29sandy/ivybridge: Native raminit.Vladimir Serbinenko
2014-07-28AGESA boards: Drop get_bus_conf.c filesKyösti Mälkki
2014-07-28AGESA fam16kb: Move NB config fam16kb out of get_bus_conf()Kyösti Mälkki
2014-07-28AGESA: Drop some excessive agesawrapper.h includesKyösti Mälkki
2014-07-24AGESA hudson yangtze: Move IMC firmware init out of get_bus_conf()Kyösti Mälkki
2014-07-23cpu/intel/fsp_model_206ax/model_206ax_init.c: Use macro `IS_ENABLED()`Paul Menzel
2014-07-23src/.../Kconfig: various small fixes to textsDaniele Forsi
2014-07-19intel/model_2065x: Remove dead code.Vladimir Serbinenko
2014-07-17cpu,Makefile.inc: Trivial - drop trailing blank lines at EOFEdward O'Callaghan
2014-07-17misc,ASL: Trivial - drop trailing blank lines at EOFEdward O'Callaghan
2014-07-14AGESA fam15: Fix entry to cimx/sb900Kyösti Mälkki
2014-07-14AGESA CIMx: Move late init out of get_bus_conf()Kyösti Mälkki
2014-07-14AGESA: Trace execution with AGESAWRAPPER()Kyösti Mälkki
2014-07-14AMD SPI: Optimise for longer writesKyösti Mälkki
2014-07-11src: Make use of 'CEIL_DIV(a, b)' macro across treeEdward O'Callaghan
2014-07-10intel/haswell: add vmx support w/Kconfig optionMatt DeVillier
2014-07-08cpu: Trivial - drop trailing blank lines at EOFEdward O'Callaghan
2014-07-05spi: Change spi_xfer to work in units of bytes instead of bits.Gabe Black
2014-07-05spi: Remove unused parameters from spi_flash_probe and setup_spi_slave.Gabe Black
2014-07-05Drop redundant select CACHE_AS_RAMKyösti Mälkki
2014-07-05intel: Make monotonic timer a first class citizenEdward O'Callaghan
2014-07-03AGESA: Call get_bus_conf() just onceKyösti Mälkki
2014-07-03AGESA: Add agesawrapper_post_device()Kyösti Mälkki
2014-07-03AGESA boards: Use acpi_s3_resume_allowed()Kyösti Mälkki
2014-07-03AGESA: Clean separation of SPI flashKyösti Mälkki
2014-07-03AGESA boards: Add prepare_for_resume()Kyösti Mälkki
2014-07-03AGESA S3: Refactor S3 backup store locations in SPIKyösti Mälkki
2014-06-30x86 MTRR: Drop unused return valueKyösti Mälkki
2014-06-30Use MTRR definesKyösti Mälkki
2014-06-29cpu/x86/pae/pgtbl.c: Unsigned comparison < 0 always falseEdward O'Callaghan
2014-06-29cpu/amd/geode_gx2/cache_as_ram.inc: Remove illegal ASCII artEdward O'Callaghan
2014-06-28Don't add .eh_frame sections to SMM imagePatrick Georgi
2014-06-25AGESA: Move config parameters for non-volatile S3 dataKyösti Mälkki
2014-06-25Declare acpi_is_wakeup_early() only onceKyösti Mälkki
2014-06-21cpu/amd/agesa: Use acpi_is_wakeup()Kyösti Mälkki
2014-06-21Misc: Use acpi_is_wakeup_s3()Kyösti Mälkki
2014-06-17intel/model_2065x: Add 20652 microcode.Vladimir Serbinenko
2014-06-06AGESA: Use common heap allocatorKyösti Mälkki
2014-05-30cpu/intel/fsp_model_206ax: change realpath to readlinkMartin Roth
2014-05-19build: use CFLAGS_* in more places where they're neededPatrick Georgi
2014-05-17build: separate CPPFLAGS from CFLAGSPatrick Georgi
2014-05-17build: CPPFLAGS is more common than INCLUDESPatrick Georgi
2014-05-13cpu/intel: Add CPU socket rPGA988BZaolin
2014-05-10Replace SERIAL_CPU_INIT with PARALLEL_CPU_INITKyösti Mälkki
2014-05-09cougar_canyon2: Switch CPU/NB/SB to the shared FSP codeMartin Roth
2014-05-09Intel FSP: add a shared set of functions for the FSPMartin Roth
2014-05-06Introduce stage-specific architecture for corebootFurquan Shaikh
2014-05-05haswell: move to mp_init libraryAaron Durbin
2014-05-03Move ARCH_* from board/Kconfig to cpu or soc Kconfig.Furquan Shaikh
2014-04-30console: Move UART port defaults to mainboardKyösti Mälkki
2014-04-30console: Drop EARLY_CONSOLE optionKyösti Mälkki
2014-04-30allwinner/a10: Hide SoC specific UART functionsKyösti Mälkki
2014-04-30uart: Support multiple portsKyösti Mälkki
2014-04-29AGESA SPI: Fix Kconfig optionsKyösti Mälkki
2014-04-28AMD: Add common header file for CAR setupKyösti Mälkki
2014-04-26Rename coreboot_ram stage to ramstageFurquan Shaikh
2014-04-26Get rid of HAVE_INIT_TIMER config optionFurquan Shaikh
2014-04-20Move MAX_PHYSICAL_CPUS to AMD k8 and fam10Kyösti Mälkki
2014-04-18console: Use romstage code for ramstage and SMMKyösti Mälkki
2014-04-16cpu/amd/agesa/family15tn: Add udelay implementation for SMMAlexandru Gagniuc
2014-04-16cpu/amd/agesa/family15tn: Add initial support for SMM modeAlexandru Gagniuc
2014-04-15vendorcode/amd/agesa/fam14: Build as a static libraryEdward O'Callaghan
2014-04-15vendorcode/amd/agesa/fam15tn: Build as a static libraryAlexandru Gagniuc
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