| Age | Commit message (Expand) | Author |
|---|
| 2018-11-08 | src: Replace common MSR addresses with macros | Elyes HAOUAS |
| 2018-11-05 | cpu/amd: Use common AMD's MSR | Elyes HAOUAS |
| 2018-11-05 | amd/mtrr: Fix IORR MTRR | Elyes HAOUAS |
| 2018-11-05 | amd: Fix non-local header treated as local | Elyes HAOUAS |
| 2018-11-01 | cpu/intel/haswell: Only change the slow ramp rate for ULT CPUs | Tristan Corrick |
| 2018-11-01 | cpu/intel/haswell: Allow use of TSC for the monotonic timer | Tristan Corrick |
| 2018-11-01 | cpu/intel/haswell: Add the CPUID for Haswell C0 CPUs | Tristan Corrick |
| 2018-11-01 | src: Add missing include <stdint.h> | Elyes HAOUAS |
| 2018-10-31 | reset: Finalize move to new API | Nico Huber |
| 2018-10-30 | {cpu,drivers,nb,sb}/amd: Replace {MSR,MTRR} addresses with macros | Elyes HAOUAS |
| 2018-10-30 | src: Add missing include <stdint.h> | Elyes HAOUAS |
| 2018-10-29 | x86/mp_init: Add configurable stack size for SMM relocate | Marshall Dawson |
| 2018-10-24 | cpu/intel/smm: Don't make assumptions on TSEG_SIZE | Arthur Heymans |
| 2018-10-23 | src: Remove unneeded whitespace | Elyes HAOUAS |
| 2018-10-22 | intel: Use CF9 reset (part 1) | Patrick Rudolph |
| 2018-10-19 | {cpu,drivers}/amd: Replace MTRR addresses with macros | Elyes HAOUAS |
| 2018-10-18 | cpu/x86/smm: Fix non-local header treated as local | Elyes HAOUAS |
| 2018-10-18 | cpu/amd: Use common AMD's MSR | Elyes HAOUAS |
| 2018-10-11 | src: Move common IA-32 MSRs to <cpu/x86/msr.h> | Elyes HAOUAS |
| 2018-10-11 | src: Replace MSR addresses with macros | Elyes HAOUAS |
| 2018-10-08 | Move compiler.h to commonlib | Nico Huber |
| 2018-10-05 | src: Fix MSR_PKG_CST_CONFIG_CONTROL register name | Elyes HAOUAS |
| 2018-10-04 | cpu/intel/car: Fix typo | Elyes HAOUAS |
| 2018-09-28 | src/*: normalize Google copyright headers | Patrick Georgi |
| 2018-09-26 | cpu/intel/model_206ax: detect number of MCE banks | Dan Elkouby |
| 2018-09-25 | src/cpu/via/nano: Remove unneeded include | Elyes HAOUAS |
| 2018-09-18 | cpu/*/car: fix ancient URL explaining XIP range run-time calculation | Stefan Tauner |
| 2018-09-14 | complier.h: add __always_inline and use it in code base | Aaron Durbin |
| 2018-09-06 | qemu-q35: Use the TSC for udelay | Michael van der Westhuizen |
| 2018-08-20 | cpu/intel/common: add function to init cppc_config | Matt Delco |
| 2018-08-17 | intel/socket_mPGA604: Keep only model f2x | Kyösti Mälkki |
| 2018-08-13 | src: Get rid of non-local header treated as local | Elyes HAOUAS |
| 2018-08-13 | cpu/intel/car: Align the stack to 16 bytes before romstage_main | Arthur Heymans |
| 2018-08-13 | cpu/x86/smm/smm_module_loader.c: Avoid static analysis error "unused value" | Richard Spiegel |
| 2018-08-09 | cpu/x86/mp_init.c: Avoid static analysis error for unused value | Richard Spiegel |
| 2018-08-09 | src/cpu: Fix typo | Elyes HAOUAS |
| 2018-08-09 | cpu/x86/mp_init.c: Fix error treatment | Richard Spiegel |
| 2018-08-09 | cpu/intel/smm: Make sure SMRR base is aligned to SMRR size | Arthur Heymans |
| 2018-08-08 | cpu/amd: Correct number of MCA banks cleared | Marshall Dawson |
| 2018-08-08 | cpu/amd: Improve formatting | Marshall Dawson |
| 2018-08-08 | cpu/amd: Rename MCA status register | Marshall Dawson |
| 2018-08-06 | mp_init: fix typo | Raul E Rangel |
| 2018-08-03 | cpu/x86/lapic/apic_timer.c: Compile the same code for all stages | Arthur Heymans |
| 2018-07-30 | nb/intel/gm45: Use common code for SMM in TSEG | Arthur Heymans |
| 2018-07-30 | cpu/intel/smm/gen1: Use correct MSR for model_6fx and model_1067x | Arthur Heymans |
| 2018-07-30 | cpu/intel/microcode: Add helper functions to get microcode info | Rizwan Qureshi |
| 2018-07-28 | nb/intel/sandybridge: Move CPU report to cpu folder | Patrick Rudolph |
| 2018-07-28 | intel/sandybridge: Don't hardcode platform type | Patrick Rudolph |
| 2018-07-25 | drivers/tpm: Add TPM ramstage driver for devices without vboot. | Philipp Deppenwiese |
| 2018-07-24 | cpu/x86/mtrr.h: Rename MSR SMRR_PHYS_x to IA32_SMRR_PHYSx | Arthur Heymans |
| 2018-07-09 | src/{arch,commonlib,cpu}: Use "foo *bar" instead of "foo* bar" | Elyes HAOUAS |
| 2018-06-28 | smm: Add canary to end of stack and die() if a stack overflow occurs | Raul E Rangel |
| 2018-06-27 | smm: Switch from %edx to %ebx | Raul E Rangel |
| 2018-06-27 | smm: Push a null stack base pointer | Raul E Rangel |
| 2018-06-27 | smm: Make local variables relative to ebp | Raul E Rangel |
| 2018-06-27 | smm: Clear SMRAM when debugging | Raul E Rangel |
| 2018-06-27 | cpu/intel/p4-netburst: skip caching rom on model_fxx | Arthur Heymans |
| 2018-06-27 | x86/car: Replace reference of copy_and_run location | Kyösti Mälkki |
| 2018-06-21 | Revert "sb/intel/{bd82x6,ibexpeak}: Move RCBA macros to a common location" | Arthur Heymans |
| 2018-06-17 | nb/intel/i440bx: Switch to POSTCAR_STAGE | Kyösti Mälkki |
| 2018-06-17 | cpu/intel/car/p3: Use variable MTRR count | Kyösti Mälkki |
| 2018-06-17 | cpu/intel/slot_1: Switch to different CAR setup | Kyösti Mälkki |
| 2018-06-17 | cpu/intel/car: Remove obsolete files | Kyösti Mälkki |
| 2018-06-14 | cpu/intel/haswell: Use the common intel romstage_main function | Arthur Heymans |
| 2018-06-14 | cpu/amd: Remove duplicated includes | Elyes HAOUAS |
| 2018-06-14 | cpu/x86: Make SMM stack size configurable | Raul E Rangel |
| 2018-06-06 | arch/x86: Always select RELOCATABLE_MODULES | Kyösti Mälkki |
| 2018-06-06 | arch/x86: Make RELOCATABLE_RAMSTAGE the default | Kyösti Mälkki |
| 2018-06-06 | arch/x86: Drop leftover ROMCC support | Kyösti Mälkki |
| 2018-06-06 | cpu/intel/model_{6xx,f2x,f3x,f4x}: Remove unneeded include | Elyes HAOUAS |
| 2018-06-05 | amd/geode_lx: Fix .c includes | Kyösti Mälkki |
| 2018-06-05 | cpu/intel/haswell: Switch to POSTCAR_STAGE | Arthur Heymans |
| 2018-06-05 | cpu/intel/model_2065x: Switch to POSTCAR_STAGE | Arthur Heymans |
| 2018-06-05 | cpu/intel/model_206ax: Switch to POSTCAR_STAGE | Arthur Heymans |
| 2018-06-05 | cpu/intel/car/non-evict: Improve a few things | Arthur Heymans |
| 2018-06-05 | cpu/intel/car/non-evict: Prepare for some POSTCAR_STAGE support | Arthur Heymans |
| 2018-06-05 | nb/intel/gm45: Switch to POSTCAR_STAGE | Arthur Heymans |
| 2018-06-05 | nb/intel/x4x: Switch to POSTCAR_STAGE | Arthur Heymans |
| 2018-06-05 | nb/intel/pineview: Switch to POSTCAR_STAGE | Arthur Heymans |
| 2018-06-05 | nb/intel/i945: Switch to POSTCAR_STAGE | Arthur Heymans |
| 2018-06-05 | cpu/intel/car/core2: Improve a few things | Arthur Heymans |
| 2018-06-05 | cpu/intel/car/core2: Prepare for POSTCAR_STAGE support | Arthur Heymans |
| 2018-06-04 | security/tpm: Unify the coreboot TPM software stack | Philipp Deppenwiese |
| 2018-06-04 | amdfam10: Drop tests for LATE_CBMEM_INIT | Kyösti Mälkki |
| 2018-06-04 | src/cpu: Get rid of whitespace before tab | Elyes HAOUAS |
| 2018-06-04 | cpu/x86/mp: Update CPU name in device structure | Naresh G Solanki |
| 2018-06-02 | intel/socket_mPGA604 intel/e7505: Switch to POSTCAR_STAGE | Kyösti Mälkki |
| 2018-06-02 | cpu/intel/car: Prepare for some POSTCAR_STAGE support | Kyösti Mälkki |
| 2018-06-02 | aopen/dxplplusu intel/e7505: Move to EARLY_CBMEM_INIT | Kyösti Mälkki |
| 2018-06-01 | src/cpu: Remove unneeded includes | Elyes HAOUAS |
| 2018-05-31 | {cpu,drivers,nb,soc}/intel: Use CACHE_ROM_BASE where appropriate | Nico Huber |
| 2018-05-31 | Remove VIA C7 CPU support | Kyösti Mälkki |
| 2018-05-31 | Remove VIA C3 CPU support | Kyösti Mälkki |
| 2018-05-31 | Remove AMD K8 cpu and northbridge support | Kyösti Mälkki |
| 2018-05-24 | Remove leftover Intel CPU support | Kyösti Mälkki |
| 2018-05-19 | cpu/x86: Add support to run function on single AP | Subrata Banik |
| 2018-05-14 | cpu/x86: Add support to run function with argument over APs | Subrata Banik |
| 2018-05-14 | cpu/x86/mp: pass pointers to structures for AP callbacks | Aaron Durbin |
| 2018-05-09 | cpu/amd/quadcore: Get rid of device_t | Elyes HAOUAS |
| 2018-05-04 | cpu/x86/mp: use __aligned macro | Aaron Durbin |
