coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2018-08-03	cpu/x86/lapic/apic_timer.c: Compile the same code for all stages	Arthur Heymans
2017-12-11	intel: Use MSR_EBC_FREQUENCY_ID instead of 0x2c	Elyes HAOUAS
2017-07-13	src/cpu: add IS_ENABLED() around Kconfig symbol references	Martin Roth
2017-03-16	cpu/x86: Wrap lines at 80 columns	Lee Leahy
2016-12-16	Set the fsb timer correctly for Netburst CPUs	Arthur Heymans
2016-08-28	src/cpu: Add required space before opening parenthesis '('	Elyes HAOUAS
2016-08-23	src/cpu: Capitalize CPU, APIC and IOAPIC typo fix	Elyes HAOUAS
2015-10-31	tree: drop last paragraph of GPL copyright header	Patrick Georgi
2015-05-21	Remove address from GPLv2 headers	Patrick Georgi
2014-04-01	x86: use car_(get\|set)_var accessors for apic timer	Aaron Durbin
2013-10-13	Rename cpu/x86/car.h to arch/early_variables.h	Stefan Reinauer
2013-05-14	x86: add thread support	Aaron Durbin
2013-05-01	lapic: monotonic time implementation	Aaron Durbin
2013-03-18	haswell: lapic timer support	Aaron Durbin
2013-03-01	GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«	Paul Menzel
2013-02-11	Intel: Replace MSR 0xcd with MSR_FSB_FREQ	Patrick Georgi
2012-11-27	Remove AMD special case for LAPIC based udelay()	Patrick Georgi
2012-07-25	Fix LAPIC timer on Ivy Bridge systems	Stefan Reinauer
2012-07-23	Re-initialize Local APIC timer on APs	Stefan Reinauer
2012-06-12	udelay: add missing bus frequency	Sven Schnelle
2012-04-05	Fix timer frequency detection on Sandybridge	Stefan Reinauer
2011-05-10	This replaces the fixed shift values in the apic timer init with macros.	Vikram Narayanan
2009-07-21	* rework tsc based timer code to use inb instead of outb for calibration	Stefan Reinauer