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path: root/src/cpu/intel
AgeCommit message (Expand)Author
2018-06-06arch/x86: Make RELOCATABLE_RAMSTAGE the defaultKyösti Mälkki
2018-06-06cpu/intel/model_{6xx,f2x,f3x,f4x}: Remove unneeded includeElyes HAOUAS
2018-06-05cpu/intel/haswell: Switch to POSTCAR_STAGEArthur Heymans
2018-06-05cpu/intel/model_2065x: Switch to POSTCAR_STAGEArthur Heymans
2018-06-05cpu/intel/model_206ax: Switch to POSTCAR_STAGEArthur Heymans
2018-06-05cpu/intel/car/non-evict: Improve a few thingsArthur Heymans
2018-06-05cpu/intel/car/non-evict: Prepare for some POSTCAR_STAGE supportArthur Heymans
2018-06-05nb/intel/gm45: Switch to POSTCAR_STAGEArthur Heymans
2018-06-05nb/intel/x4x: Switch to POSTCAR_STAGEArthur Heymans
2018-06-05nb/intel/pineview: Switch to POSTCAR_STAGEArthur Heymans
2018-06-05nb/intel/i945: Switch to POSTCAR_STAGEArthur Heymans
2018-06-05cpu/intel/car/core2: Improve a few thingsArthur Heymans
2018-06-05cpu/intel/car/core2: Prepare for POSTCAR_STAGE supportArthur Heymans
2018-06-04security/tpm: Unify the coreboot TPM software stackPhilipp Deppenwiese
2018-06-02intel/socket_mPGA604 intel/e7505: Switch to POSTCAR_STAGEKyösti Mälkki
2018-06-02cpu/intel/car: Prepare for some POSTCAR_STAGE supportKyösti Mälkki
2018-06-02aopen/dxplplusu intel/e7505: Move to EARLY_CBMEM_INITKyösti Mälkki
2018-06-01src/cpu: Remove unneeded includesElyes HAOUAS
2018-05-31{cpu,drivers,nb,soc}/intel: Use CACHE_ROM_BASE where appropriateNico Huber
2018-05-24Remove leftover Intel CPU supportKyösti Mälkki
2018-05-01Fix freeze during chipset lockdown on NehalemMatthias Gazzari
2018-04-30cpu/intel: Get rid of device_tElyes HAOUAS
2018-04-24compiler.h: add __weak macroAaron Durbin
2018-04-20pci: Move inline PCI functions to pci_ops.hPatrick Rudolph
2018-04-11Revert "model_206ax: Use parallel MP init"Arthur Heymans
2018-04-11model_206ax: Use parallel MP initArthur Heymans
2018-04-10cpu/intel/sandybridge: Put stage cache into TSEGArthur Heymans
2018-04-09intel/nehalem post-car: Use postcar_frame for MTRR setupKyösti Mälkki
2018-02-27sb/intel/{bd82x6,ibexpeak}: Move RCBA macros to a common locationArthur Heymans
2018-02-06cpu/intel/haswell: Don't select PARALLEL_CPU_INITArthur Heymans
2018-01-18cpu/intel: Remove unused CPU codeArthur Heymans
2018-01-18security/tpm: Change TPM naming for different layers.Philipp Deppenwiese
2018-01-18security/tpm: Move tpm TSS and TSPI layer to security sectionPhilipp Deppenwiese
2018-01-17cpu/intel/speedstep: Fix the PNOT ACPI methodArthur Heymans
2018-01-15Intel i82830 boards & chips: Remove - using LATE_CBMEM_INITMartin Roth
2018-01-15Intel i3100 boards & chips: Remove - using LATE_CBMEM_INITMartin Roth
2018-01-15Intel i5000 board & chips: Remove - using LATE_CBMEM_INITMartin Roth
2017-11-30intel: Replace msr(0x198) with msr(IA32_PERF_STATUS)Elyes HAOUAS
2017-11-23Constify struct cpu_device_id instancesJonathan Neuschäfer
2017-11-07cpu/intel: Add Intel FCBGA1023 socket supportHal Martin
2017-11-04cpu/intel/speedstep: Emit PPKG object for first packageNico Huber
2017-10-29cpu/intel/model_1067x: Select UDELAY_LAPICArthur Heymans
2017-10-04chromeec: Remove checks for EC in RODaisuke Nojiri
2017-09-12cpu/intel/slot_1: Increase CAR size to 8KiBKeith Hui
2017-09-12cpu/intel/car/cache_as_ram.inc: Fix long standing issuesKeith Hui
2017-09-12cpu/intel/car/cache_as_ram.inc: Remove unused codeKeith Hui
2017-09-12cpu/intel/car/cache_as_ram.inc: Remove broken HT codeKeith Hui
2017-09-11cpu/x86/mp_init: remove adjust_cpu_apic_entry()Aaron Durbin
2017-09-08intel/car: Fix stack guard placementKyösti Mälkki
2017-08-19intel/smm/gen1: Backup default SMM areaKyösti Mälkki
2017-08-19arch/x86: Clean up CONFIG_SMP and MAX_CPUS testKyösti Mälkki
2017-07-13Rename __attribute__((packed)) --> __packedStefan Reinauer
2017-07-06cpu/intel/haswell: Fix undefined behaviorRyan Salsamendi
2017-06-28cpu/intel: add IS_ENABLED() around Kconfig symbol referencesMartin Roth
2017-06-28cpu/intel/pineview: Include speedstepArthur Heymans
2017-06-28cpu/*: Add whitespace around '<<'Elyes HAOUAS
2017-06-16haswell: add CBMEM_MEMINFO table when initing RAMMatt DeVillier
2017-06-09cpu/intel/model_206ax: Use tsc monotonic timerPatrick Rudolph
2017-06-07Use more secure HTTPS URLs for coreboot sitesPaul Menzel
2017-05-16cpu/intel/turbo: Add option to disable turboSubrata Banik
2017-03-16cpu/intel: Fix the remaining issues detected by checkpatchLee Leahy
2017-03-16cpu/intel: Wrap lines at 80 columnsLee Leahy
2017-03-16cpu/intel: Fix brace issues detected by checkpatch.plLee Leahy
2017-03-16cpu/intel: Add int to unsignedLee Leahy
2017-03-16cpu/intel: Fix the spacing issuesLee Leahy
2017-03-16cpu/intel: Indent with tabsLee Leahy
2017-03-09cpu/intel/model_6{e,f}x: Unify init filesPaul Menzel
2017-02-22src/cpu/intel: Add license headers to all filesMartin Roth
2017-01-10cpu/intel/model_6fx: Add Conroe-L to cpu_device_id listArthur Heymans
2016-12-27cpu/intel/common: Add/Use common function to set virtualizationMatt DeVillier
2016-12-18intel cache-as-ram: Move DCACHE_RAM_BASEKyösti Mälkki
2016-12-11intel i945 gm45 x4x post-car: Use postcar_frame for MTRR setupKyösti Mälkki
2016-12-10cpu/intel/lga775: Do not select model_6ex CPUArthur Heymans
2016-12-09intel/sandybridge: Use postcar_frame for MTRR setupKyösti Mälkki
2016-12-06CPU: Declare cpu_phys_address_size() for all archKyösti Mälkki
2016-12-01romstage_handoff: remove code duplicationAaron Durbin
2016-11-20intel sandy/ivy: Increase XIP cache with USE_NATIVE_RAMINITKyösti Mälkki
2016-11-20intel car: Move pre-ram stack guard lowerKyösti Mälkki
2016-11-18intel/sandybridge post-car: Redo MTRR settings and stack selectionKyösti Mälkki
2016-11-18intel post-car: Increase stacktop alignmentKyösti Mälkki
2016-11-11intel cache-as-ram: Unify stack setupKyösti Mälkki
2016-11-11intel post-car: Separate files for setup_stack_and_mtrrs()Kyösti Mälkki
2016-11-11intel/sandybridge: Use common ACPI S3 recoveryKyösti Mälkki
2016-11-09Move select UDELAY_LAPIC from nb/gm45/Kconfig to cpu/model_1067x/KconfigArthur Heymans
2016-11-08cpu/intel/socket_mPGA478MN: Add socket PArthur Heymans
2016-11-08intel post-car: Split legacy socketsKyösti Mälkki
2016-10-31lib/prog_loaders: use common ramstage_cache_invalid()Aaron Durbin
2016-10-11cpu/intel/smm: Use CONFIG_SMM_TSEG_SIZENico Huber
2016-10-09cpu/intel/model_6ex: Set msr bits for dynamic L2, C2E, C4EArthur Heymans
2016-09-08Kconfig: Add option for microcode filenamesMartin Roth
2016-09-04src/cpu: Improve code formattingElyes HAOUAS
2016-08-28src/cpu: Add required space before opening parenthesis '('Elyes HAOUAS
2016-08-28src/cpu: Remove unnecessary whitespace before "\n"Elyes HAOUAS
2016-08-23src/cpu: Capitalize CPU, APIC and IOAPIC typo fixElyes HAOUAS
2016-08-01Remove non-ascii & unprintable charactersMartin Roth
2016-07-31src/cpu: Capitalize CPUElyes HAOUAS
2016-07-31src/cpu: Capitalize ROM and RAMElyes HAOUAS
2016-07-26intel car: Use MTRR WRPROT type for XIP cacheKyösti Mälkki
2016-07-26intel sandy/ivy: Redefine DCACHE_RAM_SIZE and DCACHE_RAM_MRC_VAR_SIZEKyösti Mälkki
2016-07-23intel/haswell: Remove useless MTRR clearKyösti Mälkki