| Age | Commit message (Expand) | Author |
|---|
| 2018-11-29 | arch/x86/acpigen.c: Add a method to notify all CPU cores | Arthur Heymans |
| 2018-11-21 | src/cpu/intel/Kconfig: Remove dead source | Elyes HAOUAS |
| 2018-11-19 | northbridge/intel/fsp_*: Remove legacy SoCs | zaolin |
| 2018-11-19 | cpu/intel/socket_mFCPGA478/Kconfig: Add MODEL_6{9,D}X | Elyes HAOUAS |
| 2018-11-16 | src: Remove unneeded include <cbfs.h> | Elyes HAOUAS |
| 2018-11-15 | src/cpu: Remove dead sourced lines | Elyes HAOUAS |
| 2018-11-12 | src: Remove unneeded include "{arch,cpu}/cpu.h" | Elyes HAOUAS |
| 2018-11-01 | cpu/intel/haswell: Only change the slow ramp rate for ULT CPUs | Tristan Corrick |
| 2018-11-01 | cpu/intel/haswell: Allow use of TSC for the monotonic timer | Tristan Corrick |
| 2018-11-01 | cpu/intel/haswell: Add the CPUID for Haswell C0 CPUs | Tristan Corrick |
| 2018-10-30 | src: Add missing include <stdint.h> | Elyes HAOUAS |
| 2018-10-24 | cpu/intel/smm: Don't make assumptions on TSEG_SIZE | Arthur Heymans |
| 2018-10-22 | intel: Use CF9 reset (part 1) | Patrick Rudolph |
| 2018-10-11 | src: Move common IA-32 MSRs to <cpu/x86/msr.h> | Elyes HAOUAS |
| 2018-10-11 | src: Replace MSR addresses with macros | Elyes HAOUAS |
| 2018-10-08 | Move compiler.h to commonlib | Nico Huber |
| 2018-10-05 | src: Fix MSR_PKG_CST_CONFIG_CONTROL register name | Elyes HAOUAS |
| 2018-10-04 | cpu/intel/car: Fix typo | Elyes HAOUAS |
| 2018-09-28 | src/*: normalize Google copyright headers | Patrick Georgi |
| 2018-09-26 | cpu/intel/model_206ax: detect number of MCE banks | Dan Elkouby |
| 2018-09-18 | cpu/*/car: fix ancient URL explaining XIP range run-time calculation | Stefan Tauner |
| 2018-08-20 | cpu/intel/common: add function to init cppc_config | Matt Delco |
| 2018-08-17 | intel/socket_mPGA604: Keep only model f2x | Kyösti Mälkki |
| 2018-08-13 | src: Get rid of non-local header treated as local | Elyes HAOUAS |
| 2018-08-13 | cpu/intel/car: Align the stack to 16 bytes before romstage_main | Arthur Heymans |
| 2018-08-09 | src/cpu: Fix typo | Elyes HAOUAS |
| 2018-08-09 | cpu/intel/smm: Make sure SMRR base is aligned to SMRR size | Arthur Heymans |
| 2018-07-30 | nb/intel/gm45: Use common code for SMM in TSEG | Arthur Heymans |
| 2018-07-30 | cpu/intel/smm/gen1: Use correct MSR for model_6fx and model_1067x | Arthur Heymans |
| 2018-07-30 | cpu/intel/microcode: Add helper functions to get microcode info | Rizwan Qureshi |
| 2018-07-28 | nb/intel/sandybridge: Move CPU report to cpu folder | Patrick Rudolph |
| 2018-07-28 | intel/sandybridge: Don't hardcode platform type | Patrick Rudolph |
| 2018-07-25 | drivers/tpm: Add TPM ramstage driver for devices without vboot. | Philipp Deppenwiese |
| 2018-07-24 | cpu/x86/mtrr.h: Rename MSR SMRR_PHYS_x to IA32_SMRR_PHYSx | Arthur Heymans |
| 2018-07-09 | src/{arch,commonlib,cpu}: Use "foo *bar" instead of "foo* bar" | Elyes HAOUAS |
| 2018-06-27 | cpu/intel/p4-netburst: skip caching rom on model_fxx | Arthur Heymans |
| 2018-06-27 | x86/car: Replace reference of copy_and_run location | Kyösti Mälkki |
| 2018-06-21 | Revert "sb/intel/{bd82x6,ibexpeak}: Move RCBA macros to a common location" | Arthur Heymans |
| 2018-06-17 | nb/intel/i440bx: Switch to POSTCAR_STAGE | Kyösti Mälkki |
| 2018-06-17 | cpu/intel/car/p3: Use variable MTRR count | Kyösti Mälkki |
| 2018-06-17 | cpu/intel/slot_1: Switch to different CAR setup | Kyösti Mälkki |
| 2018-06-17 | cpu/intel/car: Remove obsolete files | Kyösti Mälkki |
| 2018-06-14 | cpu/intel/haswell: Use the common intel romstage_main function | Arthur Heymans |
| 2018-06-06 | arch/x86: Make RELOCATABLE_RAMSTAGE the default | Kyösti Mälkki |
| 2018-06-06 | cpu/intel/model_{6xx,f2x,f3x,f4x}: Remove unneeded include | Elyes HAOUAS |
| 2018-06-05 | cpu/intel/haswell: Switch to POSTCAR_STAGE | Arthur Heymans |
| 2018-06-05 | cpu/intel/model_2065x: Switch to POSTCAR_STAGE | Arthur Heymans |
| 2018-06-05 | cpu/intel/model_206ax: Switch to POSTCAR_STAGE | Arthur Heymans |
| 2018-06-05 | cpu/intel/car/non-evict: Improve a few things | Arthur Heymans |
| 2018-06-05 | cpu/intel/car/non-evict: Prepare for some POSTCAR_STAGE support | Arthur Heymans |
| 2018-06-05 | nb/intel/gm45: Switch to POSTCAR_STAGE | Arthur Heymans |
| 2018-06-05 | nb/intel/x4x: Switch to POSTCAR_STAGE | Arthur Heymans |
| 2018-06-05 | nb/intel/pineview: Switch to POSTCAR_STAGE | Arthur Heymans |
| 2018-06-05 | nb/intel/i945: Switch to POSTCAR_STAGE | Arthur Heymans |
| 2018-06-05 | cpu/intel/car/core2: Improve a few things | Arthur Heymans |
| 2018-06-05 | cpu/intel/car/core2: Prepare for POSTCAR_STAGE support | Arthur Heymans |
| 2018-06-04 | security/tpm: Unify the coreboot TPM software stack | Philipp Deppenwiese |
| 2018-06-02 | intel/socket_mPGA604 intel/e7505: Switch to POSTCAR_STAGE | Kyösti Mälkki |
| 2018-06-02 | cpu/intel/car: Prepare for some POSTCAR_STAGE support | Kyösti Mälkki |
| 2018-06-02 | aopen/dxplplusu intel/e7505: Move to EARLY_CBMEM_INIT | Kyösti Mälkki |
| 2018-06-01 | src/cpu: Remove unneeded includes | Elyes HAOUAS |
| 2018-05-31 | {cpu,drivers,nb,soc}/intel: Use CACHE_ROM_BASE where appropriate | Nico Huber |
| 2018-05-24 | Remove leftover Intel CPU support | Kyösti Mälkki |
| 2018-05-01 | Fix freeze during chipset lockdown on Nehalem | Matthias Gazzari |
| 2018-04-30 | cpu/intel: Get rid of device_t | Elyes HAOUAS |
| 2018-04-24 | compiler.h: add __weak macro | Aaron Durbin |
| 2018-04-20 | pci: Move inline PCI functions to pci_ops.h | Patrick Rudolph |
| 2018-04-11 | Revert "model_206ax: Use parallel MP init" | Arthur Heymans |
| 2018-04-11 | model_206ax: Use parallel MP init | Arthur Heymans |
| 2018-04-10 | cpu/intel/sandybridge: Put stage cache into TSEG | Arthur Heymans |
| 2018-04-09 | intel/nehalem post-car: Use postcar_frame for MTRR setup | Kyösti Mälkki |
| 2018-02-27 | sb/intel/{bd82x6,ibexpeak}: Move RCBA macros to a common location | Arthur Heymans |
| 2018-02-06 | cpu/intel/haswell: Don't select PARALLEL_CPU_INIT | Arthur Heymans |
| 2018-01-18 | cpu/intel: Remove unused CPU code | Arthur Heymans |
| 2018-01-18 | security/tpm: Change TPM naming for different layers. | Philipp Deppenwiese |
| 2018-01-18 | security/tpm: Move tpm TSS and TSPI layer to security section | Philipp Deppenwiese |
| 2018-01-17 | cpu/intel/speedstep: Fix the PNOT ACPI method | Arthur Heymans |
| 2018-01-15 | Intel i82830 boards & chips: Remove - using LATE_CBMEM_INIT | Martin Roth |
| 2018-01-15 | Intel i3100 boards & chips: Remove - using LATE_CBMEM_INIT | Martin Roth |
| 2018-01-15 | Intel i5000 board & chips: Remove - using LATE_CBMEM_INIT | Martin Roth |
| 2017-11-30 | intel: Replace msr(0x198) with msr(IA32_PERF_STATUS) | Elyes HAOUAS |
| 2017-11-23 | Constify struct cpu_device_id instances | Jonathan Neuschäfer |
| 2017-11-07 | cpu/intel: Add Intel FCBGA1023 socket support | Hal Martin |
| 2017-11-04 | cpu/intel/speedstep: Emit PPKG object for first package | Nico Huber |
| 2017-10-29 | cpu/intel/model_1067x: Select UDELAY_LAPIC | Arthur Heymans |
| 2017-10-04 | chromeec: Remove checks for EC in RO | Daisuke Nojiri |
| 2017-09-12 | cpu/intel/slot_1: Increase CAR size to 8KiB | Keith Hui |
| 2017-09-12 | cpu/intel/car/cache_as_ram.inc: Fix long standing issues | Keith Hui |
| 2017-09-12 | cpu/intel/car/cache_as_ram.inc: Remove unused code | Keith Hui |
| 2017-09-12 | cpu/intel/car/cache_as_ram.inc: Remove broken HT code | Keith Hui |
| 2017-09-11 | cpu/x86/mp_init: remove adjust_cpu_apic_entry() | Aaron Durbin |
| 2017-09-08 | intel/car: Fix stack guard placement | Kyösti Mälkki |
| 2017-08-19 | intel/smm/gen1: Backup default SMM area | Kyösti Mälkki |
| 2017-08-19 | arch/x86: Clean up CONFIG_SMP and MAX_CPUS test | Kyösti Mälkki |
| 2017-07-13 | Rename __attribute__((packed)) --> __packed | Stefan Reinauer |
| 2017-07-06 | cpu/intel/haswell: Fix undefined behavior | Ryan Salsamendi |
| 2017-06-28 | cpu/intel: add IS_ENABLED() around Kconfig symbol references | Martin Roth |
| 2017-06-28 | cpu/intel/pineview: Include speedstep | Arthur Heymans |
| 2017-06-28 | cpu/*: Add whitespace around '<<' | Elyes HAOUAS |
| 2017-06-16 | haswell: add CBMEM_MEMINFO table when initing RAM | Matt DeVillier |
