| Age | Commit message (Expand) | Author |
|---|---|---|
| 2024-02-18 | arch to cpu: Add SPDX license headers to Kconfig files | Martin Roth |
| 2023-10-20 | x86: Add pre-memory stages CBFS cache scratchpad support | Jeremy Compostella |
| 2023-10-05 | cpu/intel/socket_BGA956: Double DCACHE_RAM_SIZE to 64 kB | Arthur Heymans |
| 2023-08-04 | cpu: Get rid of CPU_SPECIFIC_OPTIONS | Elyes Haouas |
| 2023-05-25 | cpu/Kconfig: Remove MMX config option | Arthur Heymans |
| 2022-11-21 | cpu/intel/socket_*: Clean up Kconfig files | Elyes Haouas |
| 2021-10-26 | cpu/intel/*/Kconfig: move selection of CPU_X86_CACHE_HELPER | Felix Held |
| 2021-10-26 | cpu/x86: Introduce `CPU_X86_CACHE_HELPER` | Felix Held |
| 2020-06-15 | gm45 boards: Factor out MAX_CPUS | Angel Pons |
| 2019-10-28 | nb/intel/gm45: Add C_ENVIRONMENT_BOOTBLOCK support | Arthur Heymans |
| 2016-12-18 | intel cache-as-ram: Move DCACHE_RAM_BASE | Kyösti Mälkki |
| 2014-07-05 | Drop redundant select CACHE_AS_RAM | Kyösti Mälkki |
| 2012-11-06 | intel/socket_BGA956: enable speedstep, CAR, MMX, SSE | Patrick Georgi |
| 2012-02-10 | Intel cpus: apply un-written naming rules | Kyösti Mälkki |
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index : coreboot.git | |
| my copy of coreboot | User & |
| summaryrefslogtreecommitdiff |