summaryrefslogtreecommitdiff
path: root/src/cpu/intel/slot_1/l2_cache.c
AgeCommit message (Expand)Author
2020-09-21src/cpu: Drop unneeded empty linesElyes HAOUAS
2020-05-11treewide: Remove "this file is part of" linesPatrick Georgi
2020-05-06treewide: replace GPLv2 long form headers with SPDX headerPatrick Georgi
2020-05-06treewide: Move "is part of the coreboot project" line in its own commentPatrick Georgi
2019-09-10AUTHORS: Move src/cpu/intel copyrights into AUTHORS fileMartin Roth
2018-11-12src: Remove unneeded include "{arch,cpu}/cpu.h"Elyes HAOUAS
2018-06-01src/cpu: Remove unneeded includesElyes HAOUAS
2017-03-16cpu/intel: Wrap lines at 80 columnsLee Leahy
2017-03-16cpu/intel: Fix brace issues detected by checkpatch.plLee Leahy
2017-03-16cpu/intel: Fix the spacing issuesLee Leahy
2017-03-16cpu/intel: Indent with tabsLee Leahy
2016-08-01Remove non-ascii & unprintable charactersMartin Roth
2015-10-31tree: drop last paragraph of GPL copyright headerPatrick Georgi
2015-05-21Remove address from GPLv2 headersPatrick Georgi
2014-07-08cpu: Trivial - drop trailing blank lines at EOFEdward O'Callaghan
2013-07-11cpu: Fix spellingMartin Roth
2013-03-01GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«Paul Menzel
2011-08-04cpu/intel/slot_1: Init L2 cache on SECC(2) CPUs.Keith Hui