Age | Commit message (Expand) | Author |
2020-05-11 | treewide: Remove "this file is part of" lines | Patrick Georgi |
2020-05-10 | src/cpu: Replace GPLv2 long form headers with SPDX header | Elyes HAOUAS |
2019-11-25 | cpu/intel/slot_1: Move to C_ENVIRONMENT_BOOTBLOCK | Arthur Heymans |
2019-09-10 | AUTHORS: Move src/cpu/intel copyrights into AUTHORS file | Martin Roth |
2018-06-17 | nb/intel/i440bx: Switch to POSTCAR_STAGE | Kyösti Mälkki |
2018-06-17 | cpu/intel/slot_1: Switch to different CAR setup | Kyösti Mälkki |
2016-11-08 | intel post-car: Split legacy sockets | Kyösti Mälkki |
2016-06-21 | intel/car/cache_as_ram.inc: Prepare for dynamic CONFIG_RAMTOP | Kyösti Mälkki |
2015-10-31 | tree: drop last paragraph of GPL copyright header | Patrick Georgi |
2015-09-04 | x86: remove cpu_incs as romstage Make variable | Aaron Durbin |
2015-05-21 | Remove address from GPLv2 headers | Patrick Georgi |
2014-07-17 | cpu,Makefile.inc: Trivial - drop trailing blank lines at EOF | Edward O'Callaghan |
2013-03-01 | GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« | Paul Menzel |
2011-08-04 | cpu/intel/slot_1: Init L2 cache on SECC(2) CPUs. | Keith Hui |
2010-10-16 | Move support for Deschutes Slot 1 CPUs (model_65x) into its own directory. | Keith Hui |
2010-10-13 | Move out Katmai Slot 1 CPUs (model_67x) from model_6xx to model_67x. | Keith Hui |
2010-10-12 | Add missing include of model_6bx for slot_1. | Keith Hui |
2010-10-06 | Convert all Intel 440BX boards to Cache-as-RAM (CAR). | Uwe Hermann |
2010-09-30 | Rename build system variables to be more intuitive, and | Patrick Georgi |
2010-03-05 | Add proper Slot 1 CPU support code/infrastructure. | Keith Hui |