Age | Commit message (Expand) | Author |
2021-10-26 | cpu/intel/*/Kconfig: move selection of CPU_X86_CACHE_HELPER | Felix Held |
2021-10-26 | cpu/x86: Introduce `CPU_X86_CACHE_HELPER` | Felix Held |
2021-04-29 | cpu/x86/mtrr: Use a Kconfig for reserving MTRRs for OS | Tim Wawrzynczak |
2021-02-02 | treewide [Kconfig]: Remove useless comment | Elyes HAOUAS |
2021-01-28 | arch/x86: Remove most C_ENV_BOOTBLOCK_SIZE limits | Kyösti Mälkki |
2020-06-04 | cpu/intel/slot_1: Select 16KiB bootblock if console is enabled | Keith Hui |
2020-05-18 | src: Remove leading blank lines from SPDX header | Elyes HAOUAS |
2020-05-11 | treewide: Remove "this file is part of" lines | Patrick Georgi |
2020-05-09 | src/: Replace GPL boilerplate with SPDX headers | Patrick Georgi |
2020-03-03 | cpu/intel/slot_1: Cache romstage XIP execution | Arthur Heymans |
2019-11-25 | cpu/intel/slot_1: Move to C_ENVIRONMENT_BOOTBLOCK | Arthur Heymans |
2019-11-25 | Kconfig: Drop the C_ENVIRONMENT_BOOTBLOCK symbol | Arthur Heymans |
2019-11-05 | intel/i440bx: Switch to UDELAY_TSC and TSC_MONOTONIC_TIMER | Kyösti Mälkki |
2019-11-03 | cpu/x86/tsc: Flip and rename TSC_CONSTANT_RATE to UNKNOWN_TSC_RATE | Kyösti Mälkki |
2019-09-10 | AUTHORS: Move src/cpu/intel copyrights into AUTHORS file | Martin Roth |
2019-07-09 | arch/x86: Flip HAVE_MONOTONIC_TIMER default | Kyösti Mälkki |
2019-07-09 | cpu/x86: Flip SMM_TSEG default | Kyösti Mälkki |
2018-06-17 | cpu/intel/slot_1: Switch to different CAR setup | Kyösti Mälkki |
2017-09-12 | cpu/intel/slot_1: Increase CAR size to 8KiB | Keith Hui |
2015-10-31 | tree: drop last paragraph of GPL copyright header | Patrick Georgi |
2015-05-21 | Remove address from GPLv2 headers | Patrick Georgi |
2014-12-30 | intel CAR: Fix DCACHE_RAM_BASE for old sockets | Kyösti Mälkki |
2014-07-05 | Drop redundant select CACHE_AS_RAM | Kyösti Mälkki |
2014-01-16 | cpu/intel: Make all Intel CPUs load microcode from CBFS | Alexandru Gagniuc |
2013-03-01 | GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« | Paul Menzel |
2010-10-15 | Drop unused DCACHE_RAM_BASE from intel/car/cache_as_ram.inc-using sockets. | Uwe Hermann |
2010-10-06 | Convert all Intel 440BX boards to Cache-as-RAM (CAR). | Uwe Hermann |
2010-05-14 | license header fixes | Nils Jacobs |
2010-03-05 | Add proper Slot 1 CPU support code/infrastructure. | Keith Hui |