coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2022-06-02	cpu/intel/model_fxx: Select SSE2	Arthur Heymans
2021-10-26	src/cpu: drop CPU_X86_CACHE_HELPER and x86_enable_cache wrapper function	Felix Held
2021-10-26	cpu/intel/*/Kconfig: move selection of CPU_X86_CACHE_HELPER	Felix Held
2021-07-02	src: Introduce `ARCH_ALL_STAGES_X86`	Angel Pons
2021-06-30	src: Move `select ARCH_X86` to platforms	Angel Pons
2020-10-17	cpu/intel,soc/intel: drop Kconfig for hyperthreading	Michael Niewöhner
2020-09-26	arch/x86: Introduce `ARCH_ALL_STAGES_X86_32`	Angel Pons
2020-07-26	cpu,soc/intel: Drop select SMP	Kyösti Mälkki
2019-10-01	cpu/intel/common: Move intel_ht_sibling() to common folder	Patrick Rudolph
2019-07-09	cpu/x86: Declare SMM_ASEG	Kyösti Mälkki
2015-01-27	vboot2: add verstage	Stefan Reinauer
2014-05-06	Introduce stage-specific architecture for coreboot	Furquan Shaikh
2014-05-03	Move ARCH_* from board/Kconfig to cpu or soc Kconfig.	Furquan Shaikh
2014-01-16	cpu/intel: Make all Intel CPUs load microcode from CBFS	Alexandru Gagniuc
2010-03-17	fix dell s1850, ROMCC didn't seem to like SSE2 memtest here.	Stefan Reinauer
2010-02-25	HAVE_MOVNTI really means SSE2. Also add sfence in the MOVNTI case.	Stefan Reinauer
2009-10-09	Remove default n statements to simplify .config and ldoptions files.	Myles Watson
2009-09-25	some progress on kconfig:	Patrick Georgi